Started working on FPGA sheet.
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@@ -91,7 +91,18 @@
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8,
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8,
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9
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9
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],
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],
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"col_widths": [],
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"col_widths": [
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162,
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147,
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91,
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67,
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91,
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91,
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91,
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71,
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91,
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91
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],
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"custom_group_rules": [],
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"custom_group_rules": [],
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"expanded_rows": [],
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"expanded_rows": [],
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"filter_by_net_name": true,
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"filter_by_net_name": true,
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@@ -103,7 +114,7 @@
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"show_unconnected_nets": false,
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"show_unconnected_nets": false,
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"show_zero_pad_nets": false,
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"show_zero_pad_nets": false,
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"sort_ascending": true,
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"sort_ascending": true,
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"sorting_column": -1
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"sorting_column": 0
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},
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},
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"open_jobsets": [],
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"open_jobsets": [],
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"project": {
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"project": {
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@@ -648,7 +648,7 @@
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"uuid": "dbb182a6-d579-468e-b98b-6f0950da9e3a"
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"uuid": "dbb182a6-d579-468e-b98b-6f0950da9e3a"
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}
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}
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],
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],
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"used_designators": "#PWR6",
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"used_designators": "U2,U5",
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"variants": []
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"variants": []
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},
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},
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"sheets": [
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"sheets": [
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@@ -663,6 +663,10 @@
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[
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[
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"64033f5d-a512-44d7-9483-4c31ef84bd56",
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"64033f5d-a512-44d7-9483-4c31ef84bd56",
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"Usb Connector"
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"Usb Connector"
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],
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[
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"73763384-ff95-4826-8da6-2de53070e62f",
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"fpga"
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]
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]
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],
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],
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"text_variables": {},
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"text_variables": {},
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