Filter RX to own-MAC + broadcast: unfiltered MACRAW hung Swiss
Compat TODO item 1. S0_MR now sets the MACRAW MF bit, so the W5100 delivers
frames addressed to SHAR or broadcast only -- what the real BBA does, since
libogc2 configures NCRB = AB|CA|2_PACKETS_PER_INT (PR=0, PM=0, AB=1).
NCRB.PR (bit 0) clears MF if the GC asks for promiscuous, sampled when socket 0
is OPENed, so a later PR change applies on the next NCRA reset.
This was not a performance issue, it was a HANG. Swiss sat on "Initialising
Network" forever. libogc2's bba_interrupt() loops
while (status) { clear IR; start_rx; status = IR & IMR; }
which only exits when IR & IMR reaches zero. Unfiltered, every frame on the
segment set RI, re-asserting faster than the loop could clear it, so it never
exited. Unplugging the ethernet cable let Swiss run all the way through and
then fail DHCP for want of a server -- a one-minute experiment that identified
it after a lot of theorising about descriptors and interrupts.
Filtering against SHAR turned out to be safe for this path after all. The
earlier worry was that MF filters on SHAR, which we write only at init, so a
driver WRITING PAR0-5 would leave it stale and MF would drop everything.
libogc2 READS the MAC out of PAR0-5 instead, so SHAR -- written from reg.par in
that same init -- cannot go stale underneath it. Broadcast still passes MF and
a DHCP OFFER unicast to our MAC passes too.
Left open and recorded: refreshing SHAR on a PAR0-5 write plus a socket
re-open, for a driver that does write it (the official SDK driver is unread).
The W5500 back-end is unchanged, being the unused alternate path; it would need
the same Sn_MR treatment if revived.
T1 expects S0_MR = MACRAW|MF in the init sequence, T1b checks promisc high
re-inits with MF clear. Mutation-tested: never setting MF fails both.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
@@ -103,6 +103,7 @@ _MR_RST = 0x80
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_MR_AI = 0x02 # address auto-increment (indirect mode)
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_MR_IND = 0x01 # indirect bus interface mode
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_S0_MR_MACRAW = 0x04
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_S0_MR_MF = 0x40 # MACRAW MAC filter: own-MAC (SHAR) + broadcast only
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_S1_MR_UDP = 0x02 # socket UDP mode
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_CR_OPEN = 0x01
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_CR_SEND = 0x20
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@@ -229,6 +230,11 @@ class W5100ParallelMaster(Elaboratable):
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self.dbg_rd_data = Signal(8)
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self.dbg_rd_done = Signal()
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self.par = Signal(48) # MAC address (PAR0..5 packed)
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# NCRB.PR from the GC. Low (the normal case) means MACRAW filters to
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# own-MAC + broadcast, which is what the real BBA does -- see the
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# comment on the S0_MODE write. Sampled when the socket is OPENed,
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# i.e. at init; a later change takes effect on the next NCRA reset.
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self.promisc = Signal()
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# TX stream
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self.tx_data = Signal(8)
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@@ -667,7 +673,28 @@ class W5100ParallelMaster(Elaboratable):
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# RMSR/TMSR = 0x55 (2 KB per socket — default; socket 0 used).
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write_reg("MEMSZ", _RMSR, [0x55, 0x55], "S0_MODE") # RMSR then TMSR
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# Socket 0: MACRAW mode, OPEN, enable interrupt.
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write_reg("S0_MODE", _S0_MR, [_S0_MR_MACRAW], "S0_OPEN")
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#
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# ⚠️ MF (MAC filter) IS SET unless the GC asked for promiscuous.
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# Without it MACRAW delivers EVERY frame on the segment, which is
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# not what the real BBA does: libogc2 configures
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# NCRB = AB|CA|2_PACKETS_PER_INT (0x52) -- PR=0, PM=0, AB=1 --
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# i.e. own-MAC + broadcast only.
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#
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# Unfiltered, this HUNG SWISS. libogc2's bba_interrupt() loops
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# while (status) { clear IR; start_rx; status = IR & IMR; }
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# which only exits when IR & IMR reaches zero. On a live segment
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# RI re-asserted faster than the loop could clear it, so it never
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# exited and Swiss sat on "Initialising Network" forever. With
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# the cable unplugged it got through, which is what identified it.
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#
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# Filtering against SHAR is safe here because libogc2 READS the
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# MAC out of PAR0-5 rather than writing it, so SHAR (written from
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# reg.par during this same init) cannot go stale underneath it.
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# A driver that WRITES PAR0-5 after init would need SHAR
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# refreshed -- see docs/bba_compat_todo.md item 1.
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write_reg("S0_MODE", _S0_MR,
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[Mux(self.promisc, _S0_MR_MACRAW,
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_S0_MR_MACRAW | _S0_MR_MF)], "S0_OPEN")
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write_reg("S0_OPEN", _S0_CR, [_CR_OPEN], "S0_IMR")
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# After S0 IMR, either finish (plain BBA) or configure the IP stack
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# and open socket 1 in UDP mode (bring-up test build).
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@@ -1011,7 +1038,7 @@ if __name__ == "__main__":
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(_SHAR0 + 0, MAC[0]), (_SHAR0 + 1, MAC[1]), (_SHAR0 + 2, MAC[2]),
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(_SHAR0 + 3, MAC[3]), (_SHAR0 + 4, MAC[4]), (_SHAR0 + 5, MAC[5]),
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(_RMSR + 0, 0x55), (_RMSR + 1, 0x55),
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(_S0_MR, _S0_MR_MACRAW),
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(_S0_MR, _S0_MR_MACRAW | _S0_MR_MF), # MF set: own-MAC + broadcast
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(_S0_CR, _CR_OPEN),
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(_IMR, 0x01),
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]
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@@ -1100,6 +1127,36 @@ if __name__ == "__main__":
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print("T1 init sequence matches expected (MR, SHAR, mem sizes, "
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"S0 MACRAW/OPEN, IMR)")
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# T1b: NCRB.PR -> promiscuous, i.e. MF CLEARED.
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#
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# The default (MF set) filters to own-MAC + broadcast, matching the
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# real BBA. Running unfiltered hung Swiss: libogc2's bba_interrupt()
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# loops until IR & IMR reaches zero, and on a live segment RI
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# re-asserted faster than the loop could clear it. But the GC can ask
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# for promiscuous via NCRB bit 0, and then it must actually get it.
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s0_default = [v for a, v in writes if a == _S0_MR]
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writes.clear()
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ctx.set(dut.promisc, 1)
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ctx.set(dut.init_req, 1)
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await ctx.tick("sync").repeat(1)
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ctx.set(dut.init_req, 0)
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for _ in range(4000):
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await ctx.tick("sync").repeat(1)
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if ctx.get(dut.init_done):
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break
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s0_promisc = [v for a, v in writes if a == _S0_MR]
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print(f"T1b S0_MR: default={[hex(v) for v in s0_default]} "
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f"promisc={[hex(v) for v in s0_promisc]}")
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if s0_default != [_S0_MR_MACRAW | _S0_MR_MF]:
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errors.append(f"T1b default S0_MR {s0_default}, want MACRAW|MF "
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f"- unfiltered MACRAW hangs Swiss")
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if s0_promisc != [_S0_MR_MACRAW]:
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errors.append(f"T1b promiscuous S0_MR {s0_promisc}, want MACRAW "
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f"with MF clear")
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ctx.set(dut.promisc, 0)
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writes.clear()
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writes.extend(EXPECTED) # restore for any later comparison
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# ── helper: stream one TX frame through the external tx interface ─────
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async def feed_frame(ctx, frame):
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for i, b in enumerate(frame):
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