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Reworks the board further

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This commit is contained in:
Dennis Brentjes
2026-08-28 17:17:54 +02:00
parent 009a643698
commit 34c54d68b0
14 changed files with 38877 additions and 7103 deletions
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hardware/re-bba-rb/re-bba-rb.kicad_pro
+6 -345
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@@ -159,7 +159,7 @@
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.2,
"min_track_width": 0.1,
"min_track_width": 0.2,
"min_via_annular_width": 0.05,
"min_via_diameter": 0.3,
"solder_mask_to_copper_clearance": 0.0,
@@ -535,7 +535,7 @@
"microvia_drill": 0.1,
"name": "ETH_DP",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 5,
"priority": 3,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"tuning_profile": "",
@@ -543,43 +543,6 @@
"via_drill": 0.3,
"wire_width": 6
},
{
"bus_width": 12,
"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "FB_Sense",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 7,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.15,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
},
{
"bus_width": 12,
"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "LED",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.15,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
},
{
"bus_width": 12,
"clearance": 0.15,
@@ -590,7 +553,7 @@
"microvia_drill": 0.1,
"name": "Power",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1,
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.3,
"tuning_profile": "",
@@ -608,7 +571,7 @@
"microvia_drill": 0.1,
"name": "PowerLV",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 3,
"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"tuning_profile": "",
@@ -616,40 +579,6 @@
"via_drill": 0.3,
"wire_width": 6
},
{
"clearance": 0.1,
"diff_pair_gap": 0.25,
"diff_pair_width": 0.2,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Signal",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.3
},
{
"bus_width": 12,
"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Termination",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 6,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.3,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
},
{
"bus_width": 12,
"clearance": 0.15,
@@ -660,7 +589,7 @@
"microvia_drill": 0.1,
"name": "USB_DP",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 4,
"priority": 2,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"tuning_profile": "",
@@ -758,274 +687,6 @@
{
"netclass": "USB_DP",
"pattern": "*FT_DN*"
},
{
"netclass": "LED",
"pattern": "/fpga/LED_G"
},
{
"netclass": "LED",
"pattern": "/fpga/LED_R"
},
{
"netclass": "LED",
"pattern": "*D6-A*"
},
{
"netclass": "LED",
"pattern": "*D7-A*"
},
{
"netclass": "LED",
"pattern": "*D8-A*"
},
{
"netclass": "LED",
"pattern": "*D8-K*"
},
{
"netclass": "LED",
"pattern": "*D9-A*"
},
{
"netclass": "LED",
"pattern": "*D11-K*"
},
{
"netclass": "LED",
"pattern": "*D12-K*"
},
{
"netclass": "LED",
"pattern": "*D13-K*"
},
{
"netclass": "LED",
"pattern": "*Q2-C*"
},
{
"netclass": "Signal",
"pattern": "*ETH_A*"
},
{
"netclass": "Signal",
"pattern": "*ETH_D*"
},
{
"netclass": "Power",
"pattern": "/exi/EXI_GND"
},
{
"netclass": "Signal",
"pattern": "*ETH_RD*"
},
{
"netclass": "Signal",
"pattern": "*ETH_WR*"
},
{
"netclass": "Signal",
"pattern": "*RSET_BG*"
},
{
"netclass": "Signal",
"pattern": "*ETH_INT*"
},
{
"netclass": "Signal",
"pattern": "*ETH_RST*"
},
{
"netclass": "Signal",
"pattern": "*ETH_CS*"
},
{
"netclass": "Signal",
"pattern": "*LED_LNK*"
},
{
"netclass": "Signal",
"pattern": "*LED_ACT*"
},
{
"netclass": "Signal",
"pattern": "*FLASH_CS*"
},
{
"netclass": "Signal",
"pattern": "*FLASH_MISO*"
},
{
"netclass": "Signal",
"pattern": "*WP*"
},
{
"netclass": "Signal",
"pattern": "*FLASH_SCK*"
},
{
"netclass": "Signal",
"pattern": "*FLASH_MOSI*"
},
{
"netclass": "Signal",
"pattern": "*CRESET*"
},
{
"netclass": "Signal",
"pattern": "*UART_RXD*"
},
{
"netclass": "Signal",
"pattern": "*UART_TXD*"
},
{
"netclass": "LED",
"pattern": "*J2-Pad9*"
},
{
"netclass": "LED",
"pattern": "*J2-Pad12*"
},
{
"netclass": "Signal",
"pattern": "*CDONE*"
},
{
"netclass": "Signal",
"pattern": "*DBG*"
},
{
"netclass": "Signal",
"pattern": "*EXI_CLK*"
},
{
"netclass": "Signal",
"pattern": "*EXI_CS*"
},
{
"netclass": "Signal",
"pattern": "*EXI_INT*"
},
{
"netclass": "Signal",
"pattern": "*EXI_MISO*"
},
{
"netclass": "Signal",
"pattern": "*EXI_MOSI*"
},
{
"netclass": "Signal",
"pattern": "*EE_CLK*"
},
{
"netclass": "Signal",
"pattern": "*EE_CS*"
},
{
"netclass": "Signal",
"pattern": "*EE_DATA*"
},
{
"netclass": "Signal",
"pattern": "*EE_DO*"
},
{
"netclass": "Signal",
"pattern": "*RESET*"
},
{
"netclass": "Signal",
"pattern": "*CLK12*"
},
{
"netclass": "Signal",
"pattern": "*EXTIN*"
},
{
"netclass": "Signal",
"pattern": "*GC_ON*"
},
{
"netclass": "Signal",
"pattern": "*CC1*"
},
{
"netclass": "Signal",
"pattern": "*CC2*"
},
{
"netclass": "Signal",
"pattern": "*PR1*"
},
{
"netclass": "Signal",
"pattern": "*U8-REF*"
},
{
"netclass": "Signal",
"pattern": "*XTAL_*"
},
{
"netclass": "Signal",
"pattern": "*OSCI*"
},
{
"netclass": "Signal",
"pattern": "*OSCO*"
},
{
"netclass": "Signal",
"pattern": "*XSCO*"
},
{
"netclass": "LED",
"pattern": "*Q1-B*"
},
{
"netclass": "LED",
"pattern": "*Q2-B*"
},
{
"netclass": "ETH_DP",
"pattern": "*MDI_TX_P*"
},
{
"netclass": "ETH_DP",
"pattern": "*MDI_TX_N*"
},
{
"netclass": "ETH_DP",
"pattern": "*MDI_RX_P*"
},
{
"netclass": "ETH_DP",
"pattern": "*MDI_RX_N*"
},
{
"netclass": "PowerLV",
"pattern": "*VPHY*"
},
{
"netclass": "Power",
"pattern": "GND"
},
{
"netclass": "Power",
"pattern": "*VBST*"
},
{
"netclass": "Termination",
"pattern": "*C18-Pad1*"
},
{
"netclass": "Termination",
"pattern": "*C19-Pad1*"
},
{
"netclass": "FB_Sense",
"pattern": "*VFB*"
}
]
},
@@ -1296,7 +957,7 @@
"uuid": "dbb182a6-d579-468e-b98b-6f0950da9e3a"
}
],
"used_designators": "",
"used_designators": "C17,#PWR090e1-3,#PWR44-50,R20-21",
"variants": []
},
"sheets": [