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finalized pcb design, need to remeasure PCB outline.

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This commit is contained in:
Dennis Brentjes
2026-07-08 22:00:53 +02:00
parent 4e7853351c
commit 620ae5cd64
55 changed files with 25126 additions and 116594 deletions
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hardware/re-bba-rb/exi.kicad_sch
+86 -12
View File
@@ -286,7 +286,7 @@
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(name "~"
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@@ -304,7 +304,7 @@
(pin passive line
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(length 1.27)
(name "~"
(name ""
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@@ -1136,8 +1136,9 @@
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(property "Description" ""
(property "Description" "Special symbol for telling ERC where power comes from"
(at 62.23 86.36 0)
(hide yes)
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(effects
@@ -1212,8 +1213,42 @@
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(property "Description" ""
(property "Description" "Polarized capacitor"
(at 96.52 86.36 0)
(hide yes)
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(property "MPN" "VZH101M1ETR-0607"
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(property "Manufacturer" "Lelon"
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@@ -1311,8 +1346,9 @@
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(property "Description" ""
(property "Description" "Special symbol for telling ERC where power comes from"
(at 62.23 91.44 0)
(hide yes)
(show_name no)
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@@ -1387,8 +1423,42 @@
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(property "Description" ""
(property "Description" "Resistor"
(at 68.58 76.2 0)
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(property "MPN" "0402WGF1002TCE"
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(property "Manufacturer" "UNI-ROYAL"
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@@ -1475,8 +1545,9 @@
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(property "Description" ""
(property "Description" "Power symbol creates a global label with name \"GND\" , ground"
(at 74.93 101.6 0)
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(property "Description" ""
(property "Description" "Power symbol creates a global label with name \"GND\" , ground"
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@@ -1580,7 +1652,7 @@
(in_bom yes)
(on_board yes)
(in_pos_files yes)
(dnp no)
(dnp yes)
(uuid "e1d71023-db8e-47ed-9ae2-d0237788b46a")
(property "Reference" "J3"
(at 49.53 72.136 0)
@@ -1604,7 +1676,7 @@
(justify left)
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(property "Footprint" "gc:SP1 BoardConnector"
(property "Footprint" "hardware:SP1 BoardConnector"
(at 60.96 88.9 0)
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@@ -1732,8 +1804,9 @@
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(property "Description" ""
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(property "Description" ""
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