Both directions proven on hardware: 60-byte ARP out, DHCP frame in
TX: the TWD fix lands a full 60-byte ARP on the wire, byte-for-byte correct (previously truncated at 16). TI sets. RX: a real 342-byte DHCP broadcast from the PC was received in MACRAW mode, assembled into the SPRAM ring and DMA-read back over EXI. The descriptor length 0x015A cross-checks exactly against the frame's own IP total-length field plus the ethernet header, so the assembler's length is confirmed, not merely plausible. Also replaces the full-path probe's 'is 08 and 06 somewhere in the buffer' guess with a real descriptor decode -- it called a DHCP frame an ARP reply. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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@@ -277,6 +277,22 @@ Pi over J4 with the board on 12 V — device ID `04 02 02 00`, NCRA reset
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self-clearing, PAR0–5, MAR0–7, ANALOG, NWAYC, IMR `0x86` readback, NCRA SR,
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self-clearing, PAR0–5, MAR0–7, ANALOG, NWAYC, IMR `0x86` readback, NCRA SR,
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and NWAYS `0x17`. See `hardware/re-bba-rb/exi_fullpath_rpi.py`.
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and NWAYS `0x17`. See `hardware/re-bba-rb/exi_fullpath_rpi.py`.
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✅ **BOTH DIRECTIONS PROVEN ON HARDWARE 2026-09-30 — the BBA data path works.**
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*GC → wire* (after the TWD fix below): a full **60-byte ARP request**, captured
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on the PC byte-for-byte correct — broadcast dst, `00:09:bf:00:00:01` source,
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ethertype 0806, sender 10.0.0.99, target 10.0.0.50, padded to 60. TI sets.
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*wire → GC*: a real **342-byte DHCP broadcast** from the PC was received by the
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W5100 in MACRAW mode, assembled into the SPRAM ring by `RXFrameAssembler`, and
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DMA-read back over EXI from 0x100. RI set. The ring descriptor read
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`00 00 01 5A` = 346 = 342 + 4, and the frame's own IP total-length field (328)
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+ 14 bytes of ethernet header = 342 — so the assembler's length is
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independently confirmed correct, not just plausible.
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Together: EXI ↔ BBARegisterFile ↔ {tx_bytes→TXFrameDrain, SPRAM ring} ↔
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W5100ParallelMaster ↔ PHY, in both directions, on silicon.
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✅ **GC→wire TX REACHES THE WIRE — the full path is proven.** A frame written
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✅ **GC→wire TX REACHES THE WIRE — the full path is proven.** A frame written
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over EXI to TXDATA and triggered via the NCRA ST bits was captured on a PC:
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over EXI to TXDATA and triggered via the NCRA ST bits was captured on a PC:
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`ff ff ff ff ff ff | 00 09 bf 00 00 01 | 08 06 | 00 01` — broadcast dst, our
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`ff ff ff ff ff ff | 00 09 bf 00 00 01 | 08 06 | 00 01` — broadcast dst, our
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@@ -122,8 +122,15 @@ if got:
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print(f" SPRAM @0x100: {hx(data[:16])}")
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print(f" SPRAM @0x100: {hx(data[:16])}")
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print(f" {hx(data[16:32])}")
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print(f" {hx(data[16:32])}")
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print(f" {hx(data[32:48])}")
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print(f" {hx(data[32:48])}")
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if 0x08 in data and 0x06 in data:
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# Decode the ring descriptor instead of guessing from stray bytes: the
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print(" -> looks like an ARP frame came back. RX PATH WORKS.")
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# first 4 bytes are the descriptor, whose length INCLUDES itself.
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dlen = (data[2] << 8) | data[3]
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etype = (data[16] << 8) | data[17]
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print(f" descriptor length 0x{dlen:04X} = {dlen} -> {dlen-4} frame bytes")
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print(f" dst {':'.join('%02x'%b for b in data[4:10])}"
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f" src {':'.join('%02x'%b for b in data[10:16])} ethertype 0x{etype:04X}")
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if 4 < dlen <= 1518:
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print(" -> RX PATH WORKS: a real frame was assembled into the SPRAM ring.")
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else:
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else:
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print(f" no RX after 3s (RWP still {hx(read(0x16,2))}, IR {read(0x09,1)[0]:02x})")
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print(f" no RX after 3s (RWP still {hx(read(0x16,2))}, IR {read(0x09,1)[0]:02x})")
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print(" TX may still have worked - check the capture.")
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print(" TX may still have worked - check the capture.")
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