Added Uart.

This commit is contained in:
2026-06-14 09:37:59 +02:00
parent a7c88109a9
commit 85f82c8740
3 changed files with 468 additions and 26 deletions
+22 -5
View File
@@ -68,12 +68,21 @@ class IceBreakerPlatform(LatticeICE40Platform):
# Bring-up status panel → iCEbreaker ONBOARD parts (dedicated pins, not
# on any PMOD, so they coexist with EXI + W5100). LEDR/LEDG are
# active-low discrete LEDs; BTN_N is the user button.
# (The onboard RGB LED on pins 39/40/41 needs an SB_RGBA_DRV instance
# wired to raw pads — board/version-specific — left as a future add-on
# to expose rx/tx/ready as colours; the 2 discrete LEDs cover bring-up.)
# RGB LED (pins 39/40/41) is driven via SB_RGBA_DRV — not declared here
# as a platform resource (see BBATopSynth.elaborate, status_panel block).
Resource("ledr", 0, Pins("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
Resource("ledg", 0, Pins("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
Resource("btn", 0, Pins("10", dir="i"), Attrs(IO_STANDARD="SB_LVCMOS")),
# UART debug console → iCEbreaker FT2232H Channel B (onboard USB-UART).
# No external hardware needed — the FT2232H is already on the board.
# On the PC: open the second USB serial port at 115200 8N1.
# pin 9 = FPGA TX → FT2232H Channel B RX (FPGA drives)
# pin 6 = FPGA RX ← FT2232H Channel B TX (FPGA reads)
Resource("uart", 0,
Subsignal("tx", Pins("9", dir="o")),
Subsignal("rx", Pins("6", dir="i")),
Attrs(IO_STANDARD="SB_LVCMOS")),
]
connectors = []
@@ -153,6 +162,14 @@ class BBATopSynth(BBATop):
o_RGB2=Signal(name="rgb_b"),
)
# ── UART debug console → FT2232H Channel B ─────────────────────
if self._uart_console:
uart = platform.request("uart", 0)
m.d.comb += [
uart.tx.o .eq(self.uart_tx),
self.uart_rx .eq(uart.rx.i),
]
return m
@@ -181,7 +198,7 @@ if __name__ == "__main__":
print(f"{'='*60}")
opts = (f"--opt-timing --seed {seed} --timing-allow-fail")
try:
platform.build(BBATopSynth(status_panel=True), do_program=False,
platform.build(BBATopSynth(status_panel=True, uart_console=True), do_program=False,
verbose=True, nextpnr_opts=opts)
except Exception as exc:
# nextpnr exits non-zero even with --timing-allow-fail on some
@@ -212,7 +229,7 @@ if __name__ == "__main__":
if do_flash:
print(f"\nFlashing with seed {best_seed}...")
opts = f"--opt-timing --seed {best_seed} --timing-allow-fail"
platform.build(BBATopSynth(status_panel=True), do_program=True,
platform.build(BBATopSynth(status_panel=True, uart_console=True), do_program=True,
verbose=True, nextpnr_opts=opts)
print("Done.")