From 8e364a46552cee1eee4ab8aff777e4c20bcf0e22 Mon Sep 17 00:00:00 2001 From: Dennis Brentjes Date: Sat, 18 Jul 2026 12:42:54 +0000 Subject: [PATCH] Add W5100S MDI termination network to ethernet schematic Per the WIZnet W5100S reference schematic (note 4: "to avoid the 100M overshoot, place the 49.9 resistors and 0.1uF capacitor near the MDI pin"): R26/R27 (49.9R 1%) from TXOP/TXON to a common node bypassed by C18 (100nF) to GND, and R28/R29 + C19 likewise for RXIP/RXIN. Attached on the PHY-side nets (chip side of D4/D5). BOM fields populated (UNI-ROYAL 0402WGF4999TCE / LCSC C25120, Samsung CL05B104KO5NNNC / C1525). Optional 3.3R series dampers deliberately omitted. Schematic only - the 6 footprints still need placing/routing next to U11 pins 2/3/5/6 (Update PCB from Schematic). DRC parity reports exactly those 6 missing footprints and nothing else. Verified: ERC 0, netlist 107->113 components, termination nets match the reference topology. Co-Authored-By: Claude Fable 5 --- hardware/re-bba-rb/TODO.md | 19 +- hardware/re-bba-rb/ethernet.kicad_sch | 1069 +++++++++++++++++++++++++ 2 files changed, 1082 insertions(+), 6 deletions(-) diff --git a/hardware/re-bba-rb/TODO.md b/hardware/re-bba-rb/TODO.md index 91dc487..d2355f0 100644 --- a/hardware/re-bba-rb/TODO.md +++ b/hardware/re-bba-rb/TODO.md @@ -25,12 +25,19 @@ W5100S reference schematic, and JLCPCB manufacturing limits. ERC/DRC: clean. - [ ] Use this final pin map when writing the board PCF (see Broader items): MOSI = pin 4, MISO = pin 3, CLK = 44 (G6), CS = 45, INT = 46. -- [ ] **W5100S MDI termination network missing** (`ethernet.kicad_sch`). - Per WIZnet W5100S reference schematic: 49.9 Ω from each of - TXOP/TXON/RXIP/RXIN to a common node with 0.1 µF to GND, placed near the - chip ("to avoid the 100M overshoot"); optionally 3.3 Ω series damping in - each line. Board routes the pairs straight through D4/D5 to the magjack. - - [ ] Add 4× 49.9 Ω 1% + 2× 0.1 µF termination. +- [ ] **W5100S MDI termination network** (`ethernet.kicad_sch`) — schematic + part DONE 2026-07-17: added R26/R27 (49.9 Ω 1%, LCSC C25120) from + TXOP/TXON to a common node + C18 (100 nF) to GND, and R28/R29 + C19 for + RXIP/RXIN, on the PHY-side nets per the WIZnet reference schematic. + ERC 0; netlist verified. Remaining (PCB rework): + - [ ] Place the 6 new footprints (Update PCB from Schematic / F8 pulls + them in) **next to U11 pins 2/3/5/6** — WIZnet: "place the 49.9 + resistors and 0.1uF capacitor near the MDI pin of W5100S". + - [ ] Keep the pair stubs to the resistors short; the ETH_DP netclass + width/gap rules still apply to the through-line. + - [ ] Optional (left out deliberately): 3.3 Ω series damping resistors + in each line (WIZnet note 6, EMI reduction) — would require + breaking the pairs; add only if EMI testing demands. - [ ] Place C51/C52 physically at J2 pins 4/5 (center taps). - [ ] Reconsider D4/D5 (USBLC6 on the line side of the magnetics): unusual — transformer already isolates; their VBUS pins float so diff --git a/hardware/re-bba-rb/ethernet.kicad_sch b/hardware/re-bba-rb/ethernet.kicad_sch index 02e1ab2..b1a971d 100644 --- a/hardware/re-bba-rb/ethernet.kicad_sch +++ b/hardware/re-bba-rb/ethernet.kicad_sch @@ -13714,4 +13714,1073 @@ ) ) ) + (text "W5100S MDI termination (WIZnet ref schematic):\n49.9R from each of TXOP/TXON/RXIP/RXIN to a common\nnode + 100nF to GND. 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