Adds last Todo item, fixes CPL and rotations.

This commit is contained in:
2026-08-28 19:27:13 +02:00
parent 34c54d68b0
commit a12e4af68b
8 changed files with 692 additions and 662 deletions
+1
View File
@@ -20,6 +20,7 @@ _autosave-*
.history/
hardware/re-bba-rb/gerbers
hardware/sp1_insert/gerbers
hardware/re-bba-rb/production
*-bom.csv
*-cpl.csv
*.rpt
@@ -3,7 +3,7 @@
(generator "pcbnew")
(generator_version "10.0")
(layer "F.Cu")
(descr "Everlight 24-21 series REVERSE-MOUNT 1206 LED. Part mounts on the component (F.Cu) side; light emits DOWN through a PCB light-window to the opposite (bottom / viewing) side. Land pattern is a standard 1206 and the central Edge.Cuts light-window (o1.5 mm) is a STARTING POINT - VERIFY the recommended land + aperture against the Everlight 24-21 datasheet (C2892757 red / C2980185 green / C424133 amber) before fabrication. Pad 1 = cathode (silk bar side).")
(descr "Everlight 24-21 series REVERSE-MOUNT 1206 LED. Part mounts on the component (F.Cu) side; light emits DOWN through a PCB light-window to the opposite (bottom / viewing) side. Land pattern is a standard 1206; the central Edge.Cuts light-window is o1.7 mm (datasheet-confirmed, spec 1.7 mm +/-0.1). Parts: C2892757 red / C2980185 green / C424133 amber. Pad 1 = cathode (silk bar side).")
(tags "LED reverse-mount 1206 Everlight 24-21 C2892757 C2980185 C424133")
(property "Reference" "REF**"
(at 0 -1.9 0)
@@ -11,7 +11,7 @@
(uuid "f1c7b965-1e2f-4f9b-8323-037693b45dc5")
(effects
(font
(size 0.8 0.8)
(size 1 1)
(thickness 0.15)
)
)
+8 -8
View File
@@ -56,8 +56,8 @@
(attr smd)
(duplicate_pad_numbers_are_jumpers no)
(fp_line
(start 0.6 -3.2)
(end 0.6 -1.8)
(start 0.6 -3.125)
(end 0.6 -1.875)
(stroke
(width 0.05)
(type default)
@@ -66,8 +66,8 @@
(uuid "3aa70938-586c-4a3e-a93d-02a45af703e9")
)
(fp_line
(start 0.6 -3.2)
(end 14.4 -3.2)
(start 0.6 -3.125)
(end 14.4 -3.125)
(stroke
(width 0.05)
(type default)
@@ -76,8 +76,8 @@
(uuid "34b53d18-e03e-4fbc-bf7a-c3cb36e989ef")
)
(fp_line
(start 0.6 -1.8)
(end 14.4 -1.8)
(start 0.6 -1.875)
(end 14.4 -1.875)
(stroke
(width 0.05)
(type default)
@@ -86,8 +86,8 @@
(uuid "d865b53d-ba89-433e-9e88-6e1c8c56a37b")
)
(fp_line
(start 14.4 -1.8)
(end 14.4 -3.2)
(start 14.4 -1.875)
(end 14.4 -3.125)
(stroke
(width 0.05)
(type default)
+2 -2
View File
@@ -35,8 +35,8 @@ running list — items are **not** being worked yet, just recorded.
D6/D8/D9/D12 = **C2980185** (24-21/G6C), amber D13 = **C424133** (24-21UYC).
All Vf ≈ 2.0 V (3.3 V-rail + SB_RGBA_DRV safe), moderate mcd. New footprint
`hardware/LED_1206_ReverseMount_Everlight_24-21.kicad_mod` (pad1=cathode,
ø1.5 mm Edge.Cuts light-window). **⚠️ VERIFY the land + light-window aperture
against the 24-21 datasheet during PCB layout** (footprint is a starting point).
**ø1.7 mm Edge.Cuts light-window — datasheet-confirmed** 2026-08-28, spec
1.7 mm ±0.1). Refdes text is 1.0 mm (JLC silk floor).
- **LED series resistors R37/R41/R42: 49.9 Ω → 330 Ω** (reused existing part
C25104; R38 already 330). ~3.9 mA vs the blinding ~26 mA — closes item 1's
resistor half. Green PWM (`_GRN_DUTY`) in gateware still applies to D6/D12; the
+20 -6
View File
@@ -34,7 +34,7 @@ lands 2×N off instead of correct.
## How to reapply — copy this exact dict, don't reconstruct it from memory
This is the complete, current correction set (all 16 parts). **Copy-paste
This is the complete, current correction set (all 20 parts). **Copy-paste
this block, don't retype it from the table below or from memory** — the one
time it was retyped from a section of prose instead of copied whole, U4 got
silently dropped and shipped with a wrong rotation.
@@ -49,12 +49,17 @@ corrections = {
'D1': -90, 'D4': -90, 'D5': -90, 'U12': -90, # SOT-23-6, reconstructed hypothesis
'U1': -180, # SOT-23-5, confirmed (two -90 corrections)
'U4': -90, # SOT-23-5, confirmed ("U4 is good")
'Q1': 180, 'Q2': 180, # SOT-23 bottom layer, confirmed "upside down"
'Q1': 180, 'Q2': 180, # SOT-23; moved bottom->F.Cu in the 2026-08-28 rework, +180 re-confirmed on the top side (JLC preview)
'D2': -90, # custom footprint, confirmed "90 CW"
'D3': 180, # SMA diode, confirmed "180"
'C65': 180, # electrolytic cap, confirmed "180"
'U2': -90, # SOT-583-8, confirmed "90 CW"
'U3': 180, # custom SOT95P280X110-6N footprint, confirmed "180"
# LED rework 2026-08-28: 7 LEDs -> reverse-mount 1206 (hardware:LED_1206_ReverseMount_Everlight_24-21),
# and the "Moved all components to F.Cu" commit put every part (incl. the former bottom-layer D8/D9/Q1/Q2)
# on the top side. Only the GREEN 24-21 parts (C2980185) need a flip — their die polarity is opposite the
# red (C2892757) / yellow (C424133) parts of the SAME footprint, so D7/D11/D13 take NO correction.
'D6': 180, 'D8': 180, 'D9': 180, 'D12': 180, # GREEN 24-21 only — confirmed via JLC placement preview 2026-08-28
} # positive = CCW, negative = CW
with open('re-bba-rb-cpl.csv', newline='') as f:
@@ -100,8 +105,11 @@ it."
entirely on that same weakened report. Treat both as **unverified**, not
settled — re-check them in the placement preview before assembly. Do not
cite "all large chips are right" as evidence again.
- **D8, D9 (LED_0603, bottom layer)** — verified 2026-07-31 by tracing the
circuit rather than by eye, see "D8/D9 polarity" below. No correction.
- ~~**D8, D9 (LED_0603, bottom layer)** — no correction.~~ **SUPERSEDED
2026-08-28.** D8/D9 were swapped to the reverse-mount 1206 footprint and moved
to F.Cu; they now take **+180°** and live in the corrections table (green
24-21, C2980185). The old "D8/D9 polarity" tracing section below is retained
for the schematic-net polarity logic but its *rotation* conclusion is stale.
- **J2 (HR911105A magjack, rot=90° in the PCB file)** — not a CPL-rotation
question (J2 doesn't need per-part correction below, it's not in the CPL
correction set), but its physical orientation was independently verified:
@@ -127,12 +135,18 @@ Each row: designator, package, raw→corrected, confidence.
| U12 | SOT-23-6 | 180° | **90°** | Reconstructed hypothesis — not independently re-confirmed |
| U1 | SOT-23-5 | 180° | **0°** (two corrections: -90° then another -90°, user-confirmed both times) | **Confirmed** by direct user feedback, twice |
| U4 | SOT-23-5 | 0° | **270°** (-90°, the same family correction as D1/D4/D5/U12) | **Confirmed** — user checked and said "U4 is good" after this delta, no second correction needed (unlike U1) |
| Q1 | SOT-23 (bottom layer) | -90° | **90°** | **Confirmed** ("upside down" = 180°, direction-agnostic) |
| Q2 | SOT-23 (bottom layer) | -90° | **90°** | **Confirmed** (same as Q1) |
| Q1 | SOT-23 (now F.Cu; was bottom) | -90° | **90°** | **Confirmed** ("upside down" = 180°, direction-agnostic; +180 re-confirmed on top after the 2026-08-28 F.Cu move, JLC preview) |
| Q2 | SOT-23 (now F.Cu; was bottom) | -90° | **90°** | **Confirmed** (same as Q1; re-confirmed on top 2026-08-28) |
| D2 | custom `SON50P110X213X50-7` | 0° | **270°** | **Confirmed** ("90° clockwise") |
| D3 | `Diode_SMD:D_SMA` | 180° | **0°** | **Confirmed** ("180°", direction-agnostic) |
| C65 | `Capacitor_SMD:CP_Elec_6.3x7.7` | 0° | **180°** | **Confirmed** ("180°", direction-agnostic) |
| U2 | SOT-583-8 | 180° | **90°** | **Confirmed** ("90° clockwise") |
| D6 | `hardware:LED_1206_ReverseMount_Everlight_24-21` (green C2980185) | -90° | **90°** (+180°) | **Confirmed** (JLC preview 2026-08-28) |
| D8 | `…24-21` (green C2980185) | 0° | **180°** (+180°) | **Confirmed** (JLC preview 2026-08-28) |
| D9 | `…24-21` (green C2980185) | 180° | **0°** (+180°) | **Confirmed** (JLC preview 2026-08-28) |
| D12 | `…24-21` (green C2980185) | -90° | **90°** (+180°) | **Confirmed** (JLC preview 2026-08-28) |
| D7, D11 | `…24-21` (red C2892757) | -90° | **-90°** (none) | **Confirmed no correction** — same footprint as the green parts but opposite die polarity (JLC preview 2026-08-28) |
| D13 | `…24-21` (yellow C424133) | -90° | **-90°** (none) | **Confirmed no correction** (JLC preview 2026-08-28) |
**"Reconstructed hypothesis" parts (U7, U10, D1, D4, D5, U12) explained:**
the user reported "SOIC and SOT chips are rotated 90°, direction unsure."
+25
View File
@@ -137,6 +137,31 @@ Major work this session:
convenience one-command multi-seed workflow needs debugging if
wanted again.
## V2 rework — silkscreen & mechanical (added 2026-08-28)
Cosmetic/mechanical items for the in-progress V2 rework (EEPROM→93LC56B,
reverse-mount LEDs, J3 slot already done). These are PCB-layout tasks, not
schematic changes.
- [ ] **1. Add the project name in silkscreen.** Put a "re-bba-rb" (or chosen
project name/version) label on the board silkscreen so the assembled board
is identifiable. Pick a copper-free spot; watch the JLC 1.0 mm min text
height / 0.15 mm min line-width floor (same rule that just caught the LED
refdes). Consider adding a small rev tag (e.g. "v2") next to it.
- [ ] **2. Extend the board out to the ethernet socket so it sits flush with the
GC.** Lengthen the board outline (Edge.Cuts) toward the RJ45/magjack (J2)
end so the finished board reaches flush with the GameCube's shell instead
of stopping short. Mechanical-only (move the board edge + any ground pour
to suit); keep the SP1/J3 edge geometry fixed. Verify the new outline
against the GC slot depth before ordering.
- [ ] **3. Add back-side silkscreen legends for the LEDs.** Label what each LED
means on **B.SilkS** (the back is the viewing side — reverse-mount LEDs
emit through the board, top faces into the GC slot). Map from the current
build: LEDG/D6 = heartbeat, LEDR/D7 = EXI activity, RGB D11 = rx / D12 =
tx / D13 = ready, D8/D9 = USB/GC power handover indicators. Confirm the
final per-LED meaning against `synth.py` + BRINGUP.md before lettering, and
mind the same silk text-height/width floor as item 1.
## Critical — ALL RESOLVED (schematic + PCB, verified 2026-07-18)
- [x] **EXI DO/DI swapped at J3 — FIXED 2026-07-17** (all copper unchanged).
File diff suppressed because it is too large Load Diff
+2 -2
View File
@@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 5,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
@@ -53,7 +53,7 @@
"board_outline_area",
"ly_points"
],
"visible_layers": "ffffffff_ffffffff_ffffd575_575555a1",
"visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
"zone_display_mode": 0
},
"git": {