Started on component selection of the final PCB.

This commit is contained in:
2026-06-13 21:58:06 +02:00
parent 5b732a0b34
commit a7c88109a9
22 changed files with 11239 additions and 578 deletions
+23 -2
View File
@@ -116,8 +116,10 @@ class BBATopSynth(BBATop):
]
# ── Bring-up status panel → onboard LEDs / button ──────────────
# Two discrete LEDs answer the #1 bring-up question on a real GC:
# LEDG = heartbeat (clock alive) LEDR = EXI activity (GC talking)
# All 5 panel LEDs mapped:
# LEDG (pin 37) = led[0] heartbeat
# LEDR (pin 11) = led[1] EXI activity
# RGB (pins 39/40/41) = led[2] rx / led[3] tx / led[4] ready
# The one onboard button → panel btn[1] (manual re-init).
if self._status_panel:
ledr = platform.request("ledr", 0)
@@ -132,6 +134,25 @@ class BBATopSynth(BBATop):
self.panel_btn.eq(Cat(C(1, 1), btn.i, C(1, 1))),
]
# iCEbreaker RGB LED has no series resistors — must use
# SB_RGBA_DRV (raw pad driver with built-in current source).
# RGB0=red→rx_act RGB1=green→tx_act RGB2=blue→ready
# Verify colour-to-element mapping against schematic at bring-up.
m.submodules.rgb_drv = Instance("SB_RGBA_DRV",
p_CURRENT_MODE="0b1",
p_RGB0_CURRENT="0b000001",
p_RGB1_CURRENT="0b000001",
p_RGB2_CURRENT="0b000001",
i_CURREN=Const(1, 1),
i_RGBLEDEN=Const(1, 1),
i_RGB0PWM=led[2],
i_RGB1PWM=led[3],
i_RGB2PWM=led[4],
o_RGB0=Signal(name="rgb_r"),
o_RGB1=Signal(name="rgb_g"),
o_RGB2=Signal(name="rgb_b"),
)
return m