BOM: exclude J3 from BOM, verify part numbers against review requirements

The BOM was already fully populated (112/113 parts with MPN+LCSC) - this
audits it against the hardware-review requirements and closes the gaps:

- J3 (SP1 edge connector) set to in_bom=no: it is PCB gold fingers, not
  a purchasable part. Netlist-vs-BOM count check now differs by exactly
  this one deliberate exclusion.
- Crystals verified CL=12pF (Y1 C70565, Y2 C9006, both JLC Basic) -
  matches the 18pF load caps and W5100S Table 9. TODO item closed.
- 12V-rail caps verified >=25V (C3/C4 25V, C6 50V, C65 Lelon 25V SMD
  electrolytic); divider/REF/RSET resistors verified 1%.
- Noted: D2 LCSC C49383400 is the ElecSuper PUSB3AB6Z(ES) clone of the
  Nexperia part (same DFN-7 package, 0.15pF) - pin-compatible.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
This commit is contained in:
2026-07-18 12:47:19 +00:00
parent 8e364a4655
commit ab42f8feb0
2 changed files with 16 additions and 6 deletions
+15 -5
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@@ -113,9 +113,10 @@ W5100S reference schematic, and JLCPCB manufacturing limits. ERC/DRC: clean.
- [ ] RSET_BG: datasheet says 12.3 kΩ 1 % (ref schematic: 12 k + 300 Ω); - [ ] RSET_BG: datasheet says 12.3 kΩ 1 % (ref schematic: 12 k + 300 Ω);
board has 12.4 k (~0.8 % off). Match if convenient. board has 12.4 k (~0.8 % off). Match if convenient.
- [ ] Crystals Y1 (FTDI 12 MHz) and Y2 (W5100S 25 MHz): 18 pF load caps are - [x] Crystals Y1/Y2 — VERIFIED 2026-07-17: the BOM parts are both CL = 12 pF
correct **only for CL ≈ 12 pF crystals** — pick parts accordingly (Y1 YXC X322512MOB4SI / C70565, Y2 X322525MOB4SI / C9006, both JLC
(W5100S Table 9 recommends CL = 12 pF). Basic, ±10 ppm) — correct for the 18 pF load caps and the W5100S
Table 9 recommendation. No change needed.
- [ ] 12 V-rail parts ≥ 25 V rating: C3, C4 (10 µF 0805), C6, C65 (100 µF - [ ] 12 V-rail parts ≥ 25 V rating: C3, C4 (10 µF 0805), C6, C65 (100 µF
electrolytic); D3 SMAJ12A already correct. electrolytic); D3 SMAJ12A already correct.
- [ ] 1 % tolerance required: R1/R2 (buck VFB divider, TI requirement), - [ ] 1 % tolerance required: R1/R2 (buck VFB divider, TI requirement),
@@ -137,8 +138,17 @@ W5100S reference schematic, and JLCPCB manufacturing limits. ERC/DRC: clean.
45° bevel** for the SP1 edge connector. 45° bevel** for the SP1 edge connector.
- [ ] Hand-solder / non-economic-assembly parts: C65 (THT electrolytic), - [ ] Hand-solder / non-economic-assembly parts: C65 (THT electrolytic),
J2 magjack (THT), J1 USB-C, D2 (DFN2111-7, tiny). Plan assembly split. J2 magjack (THT), J1 USB-C, D2 (DFN2111-7, tiny). Plan assembly split.
- [ ] Add LCSC part numbers to symbol fields for JLC PCBA BOM export; check - [x] LCSC part numbers — COMPLETE 2026-07-17: all 112 orderable components
fiducials for SMT. have Footprint + Value + MPN + LCSC + Manufacturer (netlist-vs-BOM
count check passes; the only netlist/BOM delta is J3, deliberately
excluded from BOM since the SP1 edge connector is PCB gold fingers,
not a part). 12 V-rail caps verified ≥25 V, divider/REF/RSET resistors
verified 1 %. Note: D2 is the **ElecSuper** PUSB3AB6Z(ES) clone
(C49383400, Extended), not Nexperia — same DFN-7 1.1×2.1 / 0.15 pF;
pin-compatible, but treat as a bring-up suspect if EXI ESD behaviour
looks odd. C65 is an SMD electrolytic (Lelon VZH101M1ETR-0607, 25 V) —
assembly-friendly, not THT as first assumed.
- [ ] Check fiducials for SMT assembly.
## Housekeeping (repo) — done 2026-07-17 ## Housekeeping (repo) — done 2026-07-17
+1 -1
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@@ -2813,7 +2813,7 @@
(unit 1) (unit 1)
(body_style 1) (body_style 1)
(exclude_from_sim no) (exclude_from_sim no)
(in_bom yes) (in_bom no)
(on_board yes) (on_board yes)
(in_pos_files yes) (in_pos_files yes)
(dnp yes) (dnp yes)