gc_bba_test: add header->data idle gap; device replies 22 bit-times late

First on-console run: the Identity suite failed with the device ID reading
00 00 00 10 instead of 04 02 02 00.  Bit analysis shows that is an EXACT
match for the correct stream delayed by 22 bits -- the device answers
correctly, just too late for a 32-clock window to catch more than its first
set bit.  Not corruption, and not a broken link: response latency.

At EXI index 5 (~27 MHz) 22 bit-times is ~815 ns, which is about what the CDC
chain costs (rx AsyncFIFO capture->exi, register-file decode, tx AsyncFIFO
exi->capture, SPI engine) at a 24 MHz exi clock.  The design expects the GC to
hold the clock idle between the header write and the data read so the register
file can prefetch the response; libogc's inter-call overhead alone is not
enough at full speed.

Adds bba_gap_us (default 16 us, busy-waited with CS asserted since we hold the
EXI lock) and a Gap sweep test that reports the minimum clean gap at the
current speed -- which measures the latency rather than guessing at it.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
2026-10-03 11:37:00 +02:00
parent b363e76ec4
commit abc61f3e66
3 changed files with 52 additions and 4 deletions
+17 -3
View File
@@ -1,8 +1,20 @@
#include "bba.h"
#include <string.h>
#include <unistd.h>
#include <ogc/lwp_watchdog.h>
u32 bba_speed = EXI_SPEED32MHZ; /* nominal name; ~27 MHz in reality */
u32 bba_gap_us = 16; /* see bba.h -- 0 reproduces the raw failure */
/* Busy-wait, not usleep(): we are holding the EXI lock with CS asserted, so
* yielding here is both unnecessary and imprecise at these timescales. */
static void gap(void)
{
u64 t0;
if (!bba_gap_us) return;
t0 = gettime();
while (ticks_to_microsecs(diff_ticks(t0, gettime())) < bba_gap_us) ;
}
/* Build the 2-byte EXI transaction header.
* byte0: [7]=write [6:0]=addr[12:6]
@@ -55,9 +67,10 @@ int bba_read(u16 addr, void *buf, u32 len)
if (len < 1 || len > 4) return -10;
if ((rc = begin()) < 0) return rc;
if ((rc = put_hdr(addr, len, 0)) < 0) { end(); return rc; }
/* The real GC driver pauses the clock here while the device decodes the
* header and prefetches the response into its TX FIFO. Separate EXI_Imm
* calls give us that gap for free. */
/* Hold the clock idle while the device decodes the header and prefetches
* the response into its TX FIFO. libogc's inter-call overhead alone is
* NOT enough at full EXI speed -- see bba_gap_us. */
gap();
memset(buf, 0, len);
if (EXI_ImmEx(BBA_EXI_CHAN, buf, len, EXI_READ) <= 0) { end(); return -5; }
end();
@@ -98,6 +111,7 @@ int bba_stream(u16 addr, void *buf, u32 len)
* >= 0x0100 and streams until CS rises, so ask for 4 and clock as many
* bytes as we actually want. */
if ((rc = put_hdr(addr, 4, 0)) < 0) { end(); return rc; }
gap();
memset(buf, 0, len);
if (EXI_ImmEx(BBA_EXI_CHAN, buf, len, EXI_READ) <= 0) { end(); return -5; }
end();