gc_bba_test: add header->data idle gap; device replies 22 bit-times late

First on-console run: the Identity suite failed with the device ID reading
00 00 00 10 instead of 04 02 02 00.  Bit analysis shows that is an EXACT
match for the correct stream delayed by 22 bits -- the device answers
correctly, just too late for a 32-clock window to catch more than its first
set bit.  Not corruption, and not a broken link: response latency.

At EXI index 5 (~27 MHz) 22 bit-times is ~815 ns, which is about what the CDC
chain costs (rx AsyncFIFO capture->exi, register-file decode, tx AsyncFIFO
exi->capture, SPI engine) at a 24 MHz exi clock.  The design expects the GC to
hold the clock idle between the header write and the data read so the register
file can prefetch the response; libogc's inter-call overhead alone is not
enough at full speed.

Adds bba_gap_us (default 16 us, busy-waited with CS asserted since we hold the
EXI lock) and a Gap sweep test that reports the minimum clean gap at the
current speed -- which measures the latency rather than guessing at it.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>

gc_bba_test/source/bba.h

@@ -47,6 +47,16 @@
  * oversamples it 2x at 54 MHz.  Settable so the suite can sweep it. */
 extern u32 bba_speed;
 
+/* Microseconds to hold the clock idle between the header write and the data
+ * phase, with CS still asserted.  The register file decodes the header and
+ * PROACTIVELY pushes the response into its TX FIFO during this gap; until the
+ * first byte reaches the FIFO head the device drives MISO low.  Measured on
+ * hardware 2026-10-03: at EXI index 5 the reply arrived 22 bit-times (~815 ns)
+ * late with no explicit gap, so a 4-byte read returned 00 00 00 10 -- the
+ * correct stream, just shifted out of the window.  0 = whatever gap libogc's
+ * inter-call overhead happens to give. */
+extern u32 bba_gap_us;
+
 /* All return 0 on success, negative on an EXI-layer failure. */
 
 /* Immediate read of `len` (1..4) bytes from `addr`.