docs: track the BBA compatibility gaps as TODOs
Records the differences between this implementation and what real GC software expects, with the evidence and the driver source for each, so they are worked through rather than rediscovered. Open items: no hardware RX filtering, hardcoded ring geometry, NCRB undecoded, and registers that read 0x00 where real hardware has non-zero defaults. Also records what is deliberately NOT to be implemented (the device-initiated challenge/response) and that two of our registers (TWD, HIPR) do not exist on real hardware. Notes explicitly that games use the official Nintendo SDK driver, which none of the three readable drivers is, so "no open driver does this" is weaker evidence than "the hardware has no such register". Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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@@ -1334,6 +1334,25 @@ parallel master is the default — see "W5100 vs W5500".)
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## ⚠️ Open compatibility gaps — see `docs/bba_compat_todo.md`
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Known differences between this implementation and what real GC software
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expects, with the evidence for each, are tracked in
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**`docs/bba_compat_todo.md`**. Summary of what is still OPEN:
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1. **No hardware RX filtering** — we take every frame on the segment; the real
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BBA delivers own-MAC + broadcast. Causes the ring pressure already seen on
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hardware. Needs a decision, not just code.
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2. **Ring geometry hardcoded** — `RHBP`/`BP`/`TLBP` writes ignored; a game
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using a smaller RX ring corrupts silently.
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3. **`NCRB` (0x01) not decoded** — filtering and interrupt-coalescing bits.
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4. **Registers reading `0x00` that have non-zero hardware defaults** —
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`NWAYC` `0x84`, `MISC` `0x3C`, and the rest of the map.
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Keep that file updated in the same commit whenever one is closed.
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---
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## ⚠️ Which driver actually talks to us — and the TWO interrupt levels
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**Swiss has several ethernet back-ends, and `cube/patches/bba/` holds one file
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