Roflin/rebbarb
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  • 81446789dc w5100/w5500: annotate the intentionally-unreferenced register map main Roflin 2026-10-10 20:21:41 +02:00
  • 7ad03a34ac exi_capture: document the three pin-clocked domains correctly Roflin 2026-10-10 20:20:01 +02:00
  • 8825cfb3d6 bba_top: document the integration, and retract a comment claiming an open bug Roflin 2026-10-10 20:17:22 +02:00
  • 20d64ac416 rx_frame_assembler: document the ring and descriptor, drop stale references Roflin 2026-10-10 20:02:34 +02:00
  • 41ba716759 spi_mode3_slave: document the engine, and fix three stale comments Roflin 2026-10-10 19:56:51 +02:00
  • b5961d0731 synth: document the build flow, and fix comments that had gone stale Roflin 2026-10-10 19:48:49 +02:00
  • f4e7e2c661 CLAUDE.md: refresh the seed table after the cleanup pass Roflin 2026-10-10 19:42:19 +02:00
  • 41d487e1a7 Cut dead signals and the unused W5100 debug peek Roflin 2026-10-10 19:42:02 +02:00
  • dac9c0c065 bba_register_file: delete the dead rx_rptr FIFO and unused constants Roflin 2026-10-10 19:25:51 +02:00
  • b175cb0e77 bba_register_file: document the gateware, drop the history and client talk Roflin 2026-10-10 19:18:38 +02:00
  • c887ab32fa fsp-server: report capability separately from duty cycle Roflin 2026-10-10 16:45:14 +02:00
  • 4e412c8b9b fsp-server: stop clamping GET_FILE replies to 1024, which capped streaming Roflin 2026-10-10 16:39:46 +02:00
  • 2172a85f0e fsp-server: implement writes, which booting a game requires Roflin 2026-10-10 16:32:36 +02:00
  • 7b94da0be5 fsp-server: add a raw-ethernet transport, because UDP replies never arrived Roflin 2026-10-10 16:26:00 +02:00
  • e56f21341a fsp-server: log the transaction id and retry counter, add --trace Roflin 2026-10-10 16:20:23 +02:00
  • cb0df55699 fsp-server: reply checksums must use fsplib's VERIFIER formula, not its writer Roflin 2026-10-10 16:16:56 +02:00
  • f3fee56673 fsp-server: implement GET_PRO (0x47), which Swiss asks for first Roflin 2026-10-10 16:11:34 +02:00
  • fd95643593 scripts: add a read-only FSP server so Swiss can stream a disc image Roflin 2026-10-10 16:06:08 +02:00
  • 2da721d7ed scripts: add a GameCube disc-image validator for BBA dumps Roflin 2026-10-10 15:49:05 +02:00
  • 4e7a2ef429 analyse-pcap: count UDP, because ROM streaming is UDP/FSP not TCP Roflin 2026-10-10 15:32:45 +02:00
  • d8ddea13ba Measure the throughput limit: window x RTT, not the adapter Roflin 2026-10-10 15:26:39 +02:00
  • d6fb7c81b9 scripts: add a pcap analyser to find the BBA throughput limit Roflin 2026-10-10 15:21:47 +02:00
  • 0c5a7bf9db mini-dhcpd: stop reporting ARP as a corrupted frame Roflin 2026-10-10 15:07:44 +02:00
  • 29ce281a7f scripts: add a minimal raw-socket DHCP server for BBA bring-up Roflin 2026-10-10 15:02:34 +02:00
  • 2893e7f6fb Filter RX to own-MAC + broadcast: unfiltered MACRAW hung Swiss Roflin 2026-10-10 14:51:17 +02:00
  • 90a583dd46 Remove the device-ID one-shot: it made Swiss see no adapter at all Roflin 2026-10-10 14:33:12 +02:00
  • 991342c0b5 docs: geom_honoured is asserted but not wired anywhere yet Roflin 2026-10-10 14:24:53 +02:00
  • 052e1a4252 gc_bba_test: shorten the driver-shapes suite description to fit the row Roflin 2026-10-10 14:22:42 +02:00
  • 6b2e6724a2 Fix the 0/8 timing failure the ring-geometry change caused Roflin 2026-10-10 14:16:43 +02:00
  • 147ef8fcfc Honour the GC's ring geometry (BP / RHBP) instead of hardcoding it Roflin 2026-10-10 14:06:04 +02:00
  • 4a455bbe88 Decode NCRB and the registers with non-zero hardware defaults Roflin 2026-10-10 14:02:28 +02:00
  • e10849f73d docs: track the BBA compatibility gaps as TODOs Roflin 2026-10-10 11:40:55 +02:00
  • 530d58df4f Record the measured timing cost of the command register file Roflin 2026-10-10 11:30:50 +02:00
  • 7116bc1ecc Implement the command registers libogc2 actually touches Roflin 2026-10-10 11:24:23 +02:00
  • 49d7e8fcff Correct the framing: the two command forms are padding, not protocols Roflin 2026-10-10 11:18:09 +02:00
  • 0d100eb84f Implement the COMMAND-level interrupt: without it no driver sees a frame Roflin 2026-10-10 11:11:55 +02:00
  • 88d05988b5 Document that the command decoder is one mechanism, and its real limit Roflin 2026-10-10 11:04:02 +02:00
  • b3685237b2 Support BOTH command-space forms: Swiss's 4-byte and libogc's 2-byte Roflin 2026-10-10 11:01:33 +02:00
  • 71ec6a2b37 TX: count the TXDATA bytes, because libogc never writes TWD Roflin 2026-10-10 10:49:11 +02:00
  • 0aa1fa884a Fix command-space writes, and replay libogc's real init sequence Roflin 2026-10-10 10:42:17 +02:00
  • d83f7beef8 Fix the RX ring descriptor to the format libogc actually parses Roflin 2026-10-10 10:27:45 +02:00
  • 5ee1b9d07b gc_bba_test: tell a spent id_phase from a real fault using the hardware Roflin 2026-10-10 10:17:41 +02:00
  • 2b0cbdd809 gc_bba_test: free the RX ring before waiting for a frame Roflin 2026-10-10 10:14:19 +02:00
  • e20b34b5e9 gc_bba_test: report where ring frames actually are when t_dma fails Roflin 2026-10-10 10:09:27 +02:00
  • abab26232b Fix the +1 descriptor offset: drop the arbiter's response register Roflin 2026-10-10 09:43:25 +02:00
  • 007c4d40f9 Record the 16-bit SPRAM response as falsified, and why Roflin 2026-10-10 09:18:50 +02:00
  • bd4c69c5f2 Establish the +1 offset mechanism: tx FIFO underrun, not a stale byte Roflin 2026-10-09 20:17:19 +02:00
  • 2eba68a013 Reproduce the +1 descriptor offset in simulation (bba_top T9) Roflin 2026-10-09 20:05:48 +02:00
  • 8691b09676 docs: record netboot throughput at 6.4 s and what txto=0 does and does not say Roflin 2026-10-09 19:56:13 +02:00
  • ada9378628 Restore the TX-done clears to the TX handler; shorten the ACK timeout Roflin 2026-10-09 19:54:23 +02:00
  • 04a797e7e7 netboot: stop the TI poll turning a slow ACK into a missed deadline Roflin 2026-10-09 19:42:24 +02:00
  • d67f111019 Don't advance the write address across TXDATA; deepen tx_bytes to 2048 Roflin 2026-10-09 19:36:21 +02:00
  • 1a1557ff54 Add R on the main menu to boot Swiss and leave the test app Roflin 2026-10-09 19:17:34 +02:00
  • 1e370deb49 Bound the TXDATA chunk to half the tx_bytes depth Roflin 2026-10-09 19:16:28 +02:00
  • a2e8e5ceaf Batch TXDATA writes; record netboot working and the +1 offset as open Roflin 2026-10-09 19:13:28 +02:00
  • 799692a5f4 netboot: stop with the summary before booting Swiss Roflin 2026-10-09 19:09:05 +02:00
  • ee889eb40f netboot: make the transfer round-trip efficient Roflin 2026-10-09 19:04:52 +02:00
  • e9b1a75bfe Discard SPRAM responses with no request outstanding Roflin 2026-10-09 19:00:35 +02:00
  • f62afff6f3 netboot: actually TRANSMIT the ACK Roflin 2026-10-09 18:50:35 +02:00
  • 4831c1353c netboot: locate the descriptor, report the offset split, stop scrolling Roflin 2026-10-09 18:45:00 +02:00
  • 2aa50a7cc3 Reset the assembler's own write pointer on NCRA reset too Roflin 2026-10-09 18:41:06 +02:00
  • f69b4d084a Model write-port stalls in the assembler testbench (T5) Roflin 2026-10-09 17:18:04 +02:00
  • 92f7d716d9 Add RBFI ring-overflow protection: drop frames instead of overwriting Roflin 2026-10-09 12:36:07 +02:00
  • a16d6f0432 netboot: stop the diagnostics slowing the loop they diagnose Roflin 2026-10-09 12:20:14 +02:00
  • 1327f82719 netboot: detect being lapped by the ring writer; quiet-link guidance Roflin 2026-10-09 12:13:29 +02:00
  • 0477e07b84 netboot: survive stray frames, and dump the page instead of guessing Roflin 2026-10-09 12:07:13 +02:00
  • 86cd5d1abd Fix two dropped-write bugs in RXFrameAssembler's SPRAM handshake Roflin 2026-10-09 12:04:00 +02:00
  • 77cd00a63c netboot: hold the screen on failure, dump the descriptor, shrink the block Roflin 2026-10-09 11:48:39 +02:00
  • 83a62d60a0 Reset the register file's ring pointers on an NCRA reset Roflin 2026-10-09 11:44:03 +02:00
  • 8493c0ce9d netboot: sync RRP to RWP at init instead of trusting what we inherited Roflin 2026-10-09 11:36:06 +02:00
  • 7cd0071e7c netboot: reset and enable the adapter before waiting for frames Roflin 2026-10-09 11:28:35 +02:00
  • 7c9488b617 Keep one generation back, and verify before touching the existing build Roflin 2026-10-09 11:26:58 +02:00
  • 30563b166d Self-update writes the new build to SD, then boots known-good /boot.dol Roflin 2026-10-09 11:23:38 +02:00
  • 4fd337fb24 Fix the netboot launcher: relocate the copier, reserve the staging region Roflin 2026-10-09 11:13:32 +02:00
  • b438960eb5 Add self-update over the BBA: receive a .dol and relaunch into it Roflin 2026-10-09 11:08:48 +02:00
  • 3db4ab0851 Reset both SPRAM ring pointers to page 1, not 0 Roflin 2026-10-09 11:06:22 +02:00
  • 19044307bf Make the DMA descriptor test follow RRP instead of hardcoding 0x100 Roflin 2026-10-09 10:55:15 +02:00
  • a5ca8b0cda Skip the raw ID dump once id_phase is consumed; record the full console pass Roflin 2026-10-09 10:53:59 +02:00
  • 7587636b48 Answer the device-ID query from the bit engine, not the register file Roflin 2026-10-09 10:51:37 +02:00
  • 5db3b7751a docs: MISO timing solved on hardware; command-space ID latency still open Roflin 2026-10-09 10:42:12 +02:00
  • 7ac0cbe66c Launch MISO a full cycle early instead of chasing delay Roflin 2026-10-09 10:35:32 +02:00
  • a5b4d5bafd Add a per-speed raw dump to the GC test app Roflin 2026-10-09 10:23:41 +02:00
  • 2f081a3e69 Drive MISO from an SB_IO output register Roflin 2026-10-03 19:26:08 +02:00
  • 5f7f20db43 Cut the MISO output path: drop EXI_J4 and the CS mux; rank seeds by it Roflin 2026-10-03 19:16:58 +02:00
  • d35688390e Take the TX bit phase from the rising-edge counter, not a falling-edge one Roflin 2026-10-03 19:04:52 +02:00
  • 91c3bf0ece Clock the EXI bit engine from the EXI pin: timing closes on all 8 seeds Roflin 2026-10-03 17:10:11 +02:00
  • 02239466fb Merge the exi and sync domains into one Roflin 2026-10-03 17:02:58 +02:00
  • da21a080d9 TX passes at 27 MHz; remaining DMA offset traced to needless exi/sync CDC Roflin 2026-10-03 16:56:03 +02:00
  • a3b3e052bc WIP rewrite: clock the EXI bit engine from the EXI clock pin Roflin 2026-10-03 16:47:42 +02:00
  • d95f2147a4 docs: EXI edge fix confirmed on hardware; MISO delay is the one open fault Roflin 2026-10-03 16:33:33 +02:00
  • afc10d7e5c fix(spi): sample MOSI on the RISING edge -- real Mode 3, not Mode 2 Roflin 2026-10-03 13:00:49 +02:00
  • 6f151cd1ff gc_bba_test: add raw slot dumps to locate the response Roflin 2026-10-03 12:46:46 +02:00
  • e682fded4a gc_bba_test: disambiguate the speed sweep result Roflin 2026-10-03 12:43:11 +02:00
  • 7df0c97c78 sim: make the EXI clock rate configurable; default was 8x too slow Roflin 2026-10-03 12:36:50 +02:00
  • 399fbf02a4 fix(exi_capture): TX pop threshold must follow the header length Roflin 2026-10-03 12:27:31 +02:00
  • 2458884160 Rework the EXI decoder to the real GC<->BBA protocol Roflin 2026-10-03 11:58:52 +02:00
  • f2762f613d docs: record the REAL GC<->BBA EXI protocol; current header format is wrong Roflin 2026-10-03 11:47:50 +02:00
  • abc61f3e66 gc_bba_test: add header->data idle gap; device replies 22 bit-times late Roflin 2026-10-03 11:37:00 +02:00
  • b363e76ec4 scripts: add gc-testlink.sh to configure the PC side of the test link Roflin 2026-10-03 11:26:52 +02:00
  • d8725392a5 gc_bba_test: fix inverted EXI error checks; builds clean Roflin 2026-10-03 11:24:47 +02:00