Dennis Brentjes 620ae5cd64 finalized pcb design, need to remeasure PCB outline.

2026-07-08 22:00:53 +02:00

..

__init__.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

bba_register_file.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

bba_top.py

finalized pcb design, need to remeasure PCB outline.

2026-07-08 22:00:53 +02:00

diagram.py

Adds diagrams.

2026-06-13 19:02:58 +02:00

eeprom_model.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

exi_capture.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

rx_frame_assembler.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

spi_mode3_slave.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

spram_arbiter.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

status_panel.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

synth.py

finalized pcb design, need to remeasure PCB outline.

2026-07-08 22:00:53 +02:00

tx_frame_drain.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

uart_console.py

Added Uart.

2026-06-14 09:37:59 +02:00

w5100_parallel_master.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00

w5500_spi_master.py

Added full design created with Claude

2026-06-13 18:35:38 +02:00