Initial work on reading instructions from bootROM

sim/shared/clkgen.sv

@@ -0,0 +1,18 @@
+module clkgen #(
+    PERIOD_NS      = 10,
+    RESET_DELAY_NS = 100
+) (
+    output logic clk_o,
+    output logic nreset_o
+);
+
+    initial begin
+        clk_o    <= 1'b0;
+        nreset_o <= 1'b0;
+        #RESET_DELAY_NS nreset_o <= 1'b1;
+    end
+
+    always
+        #(PERIOD_NS/2) clk_o <= ~clk_o;
+
+endmodule

sim/tbench/tb_top.sv

@@ -3,19 +3,15 @@ module tb_top ();
     logic clk;
     logic nreset;
 
+    clkgen clkgen_inst (
+        .clk_o   (clk),
+        .nreset_o(nreset)
+    );
+
     gb gb_inst (
         .clk_i   (clk),
         .nreset_i(nreset)
     );
 
-    initial begin
-        clk    = 1'b0;
-        nreset = 1'b1;
-
-        #1  nreset = 1'b0;
-        #24 nreset = 1'b1;
-    end // initial
-
-    always #5 clk = ~clk;
 
 endmodule : tb_top