TB       = tb_top
SOURCES  = gb.sv cpu.sv registers.sv control.sv decode.sv rom.sv tb_top.sv clkgen.sv
PATH_SRC = ../rtl:../rtl/cpu:../rtl/shared:../sim/tbench:../sim/shared

gb.sdb:  cpu.sdb rom.sdb
cpu.sdb: control.sdb fetch.sdb registers.sdb

include ../synthflow/vivado/Makefile.rules