svgb/rtl/cpu
Koray Yanik fda176d3b5 Complete rewrite from scratch, bootstrap WIP
Rewrite to use several bus multiplexers, resulting into a less messy
microarchitecture (hopefully). Some more room for cleanup though...

Supports every instruction from the bootstrap rom, more or less.
LY hacked at 0x90 to progress through vsync instantly.
No cartridge is present yet, so we will always fail checksum test and lock up.
2023-10-01 23:00:56 +01:00
..
alu16.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
alu.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
cpu_pkg.svh Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
cpu.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
ctrl.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
idec.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
regbank.sv Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00