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TB = tb_top
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SOURCES = gb.sv cpu.sv registers.sv control.sv rom.sv tb_top.sv clkgen.sv
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PATH_SRC = ../rtl:../rtl/cpu:../rtl/shared:../sim/tbench:../sim/shared
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gb.sdb: cpu.sdb rom.sdb
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cpu.sdb: control.sdb fetch.sdb registers.sdb
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include ../synthflow/vivado/Makefile.rules |