svgb/rtl/cpu/cpu_pkg.svh

14 lines
190 B
Systemverilog

package cpu_pkg;
typedef enum {
ST0_ADDR,
ST1_DEC,
ST2_EXEC,
ST2_DEC,
ST3_INC_ADDR,
ST3_DEC,
ST4_EXEC
} state_t;
endpackage