106 lines
4.0 KiB
Python
106 lines
4.0 KiB
Python
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import os
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import subprocess
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from amaranth import *
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from amaranth.build import *
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from amaranth.vendor.intel import *
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from .resources import *
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__all__ = ["Chameleon96Platform"]
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class Chameleon96Platform(IntelPlatform):
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device = "5CSEBA6" # Cyclone V SE 110K LEs
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package = "U19" # UBGA-484
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speed = "I7"
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default_clk = "cyclonev_oscillator"
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resources = [
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# WIFI and BT LEDs
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*LEDResources(
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pins="Y19 Y20",
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attrs=Attrs(io_standard="2.5 V")),
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# TDA19988 HDMI transmitter
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Resource("tda19988", 0,
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Subsignal("vpa", Pins(" W8 W7 V6 V5 U6 ", dir="o")), # bits 3 to 7
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Subsignal("vpb", Pins("AB5 AA5 AA8 AB8 AB9 Y11", dir="o")), # bits 2 to 7
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Subsignal("vpc", Pins(" W6 Y5 AB7 AA7 AA6", dir="o")), # bits 3 to 7
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Subsignal("pclk", Pins("AB10", dir="o")),
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Subsignal("hsync", Pins("V10 ", dir="o")),
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Subsignal("vsync", Pins("V7 ", dir="o")),
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Subsignal("de", Pins("Y8 ", dir="o")),
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Attrs(io_standard="1.8 V")
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),
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I2CResource("tda19988_i2c", 0,
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scl="U7", sda="U10",
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attrs=Attrs(io_standard="1.8 V"),
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),
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Resource("tda19988_i2s", 0,
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Subsignal("mclk", Pins("V11 ", dir="o")), # OSC_IN/AP3
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Subsignal("txd", Pins("AA11", dir="o")), # AP1
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Subsignal("txc", Pins("W11 ", dir="o")), # ACLK
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Subsignal("txfs", Pins("V9 ", dir="o")), # AP0
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Attrs(io_standard="1.8 V")
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),
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# Wifi and BT module
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*SDCardResources("wifi", 0,
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clk="AB20", cmd="AB18", dat0="Y14", dat1="AB19", dat2="AA18", dat3="AB15",
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attrs=Attrs(io_standard="1.8 V"),
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),
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Resource("bt", 0,
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Subsignal("host_wake", Pins("AB12", dir="o")),
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Attrs(io_standard="1.8 V"),
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),
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Resource("bt_i2s", 0,
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Subsignal("txd", Pins("Y15 ", dir="o")), # BT_PCM_IN
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Subsignal("rxd", Pins("Y16 ", dir="i")), # BT_PCM_OUT
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Subsignal("txc", Pins("AA13", dir="i")), # BT_PCM_CLK
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Subsignal("txfs", Pins("AB13", dir="i")), # BT_PCM_SYNC
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Attrs(io_standard="1.8 V"),
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),
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UARTResource("bt_uart", 0,
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rx="AB14", cts="AB17", tx="AA15", rts="AA16", role="dte",
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attrs=Attrs(io_standard="1.8 V"),
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),
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]
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connectors = [
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# J3, 2x20 expansion port
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Connector("J", 3,
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"- - Y13 - W14 - C5 - C6 -"
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"- - - - - E5 - F5 - A6"
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"- A5 - - - - - - - -"
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"- - - - - - - - - -"
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),
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# J8, 2x30 high speed expansion port (MIPI CSI)
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Connector("J", 8,
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"- V16 - U17 - - - V17 - W18"
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"- - - U18 W12 V19 - - - -"
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"- - - - - - - - - -"
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"- - - - - - - - - -"
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"- - - - - - - - - -"
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"- - - - - - - - - -"
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),
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]
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def toolchain_program(self, products, name):
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quartus_pgm = os.environ.get("QUARTUS_PGM", "quartus_pgm")
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with products.extract("{}.sof".format(name)) as bitstream_filename:
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# The @2 selects the second device in the JTAG chain, because this chip
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# puts the ARM cores first.
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subprocess.check_call([quartus_pgm, "--haltcc", "--mode", "JTAG",
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"--operation", "P;" + bitstream_filename + "@2"])
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if __name__ == "__main__":
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from .test.blinky import Blinky
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Chameleon96Platform().build(Blinky(), do_program=True)
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