Restructured Amaranth code to be able to import sibling modules
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from typing import Callable
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from ReBba.Components.ExiClock import ClockState
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from amaranth import Const, Elaboratable, Signal
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def empty():
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yield None
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def exiClockCycle(exiClock: Signal, AfterHigh: Callable = empty, AfterFalling: Callable = empty, AfterLow: Callable = empty, AfterRising: Callable = empty):
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yield exiClock.eq(ClockState.HIGH)
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yield
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yield from AfterHigh()
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yield
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yield exiClock.eq(ClockState.FALLING)
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yield from AfterFalling()
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yield exiClock.eq(ClockState.LOW)
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yield
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yield from AfterLow()
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yield
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yield exiClock.eq(ClockState.RISING)
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yield from AfterRising()
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def resetDut(rst: Signal):
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yield
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yield rst.eq(Const(1))
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yield
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yield rst.eq(Const(0))
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yield
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