67 lines
2.3 KiB
Python
67 lines
2.3 KiB
Python
import os
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import subprocess
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from amaranth.build import *
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from amaranth.vendor.lattice_ice40 import *
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from .resources import *
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__all__ = ["ICE40UP5KBEVNPlatform"]
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class ICE40UP5KBEVNPlatform(LatticeICE40Platform):
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device = "iCE40UP5K"
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package = "SG48"
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default_clk = "clk12"
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resources = [
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# J51 must be connected to use clk12 (it is by default)
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Resource("clk12", 0, Pins("35", dir="i"),
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Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS")),
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# 3 LEDs are present in an RGB common-anode package.
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*LEDResources(
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pins="39 40 41", invert=True,
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attrs=Attrs(IO_STANDARD="SB_LVCMOS")
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),
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Resource("led_b", 0, PinsN("39", dir="o"),
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Attrs(IO_STANDARD="SB_LVCMOS")),
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Resource("led_g", 0, PinsN("40", dir="o"),
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Attrs(IO_STANDARD="SB_LVCMOS")),
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Resource("led_r", 0, PinsN("41", dir="o"),
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Attrs(IO_STANDARD="SB_LVCMOS")),
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# 4 DIP switches are available, requiring internal pull-ups.
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# The switches' "ON" label points to the position which
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# connects them to ground, so invert the inputs.
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*SwitchResources(pins="23 25 34 43", invert=True,
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attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1)
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),
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*SPIFlashResources(0,
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cs_n="16", clk="15", copi="14", cipo="17",
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attrs=Attrs(IO_STANDARD="SB_LVCMOS")
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),
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]
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connectors = [
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Connector("aardvark", 0, # J1
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"- - - - 14 - 15 17 16 -"),
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Connector("pmod", 0, # U6 (board), U11 (schematic)
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"16 14 17 15 - - 27 26 32 31 - -"),
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Connector("j", 0, # 'Header A' (J52)
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"- - 39 14 40 17 - 15 41 16 - -"),
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Connector("j", 1, # 'Header B' (J2)
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"- - 23 - 25 - 26 36 27 42 32 38 31 28 37 15 34 - 43 -"),
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Connector("j", 2, # 'Header C' (J3)
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"- 12 3 21 3 13 48 20 45 19 47 18 44 11 46 10 2 9 - 6"),
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]
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def toolchain_program(self, products, name):
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iceprog = os.environ.get("ICEPROG", "iceprog")
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with products.extract("{}.bin".format(name)) as bitstream_fn:
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subprocess.check_call([iceprog, bitstream_fn])
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if __name__ == "__main__":
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from .test.blinky import *
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ICE40UP5KBEVNPlatform().build(Blinky(), do_program=True)
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