Commit Graph

9 Commits

Author SHA1 Message Date
Roflin 8e364a4655 Add W5100S MDI termination network to ethernet schematic
Per the WIZnet W5100S reference schematic (note 4: "to avoid the 100M
overshoot, place the 49.9 resistors and 0.1uF capacitor near the MDI
pin"): R26/R27 (49.9R 1%) from TXOP/TXON to a common node bypassed by
C18 (100nF) to GND, and R28/R29 + C19 likewise for RXIP/RXIN. Attached
on the PHY-side nets (chip side of D4/D5). BOM fields populated
(UNI-ROYAL 0402WGF4999TCE / LCSC C25120, Samsung CL05B104KO5NNNC /
C1525). Optional 3.3R series dampers deliberately omitted.

Schematic only - the 6 footprints still need placing/routing next to
U11 pins 2/3/5/6 (Update PCB from Schematic). DRC parity reports
exactly those 6 missing footprints and nothing else.

Verified: ERC 0, netlist 107->113 components, termination nets match
the reference topology.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-07-18 12:42:54 +00:00
Roflin 3547302ec2 Finished the PCB design 2026-07-17 21:35:02 +02:00
Dennis Brentjes 620ae5cd64 finalized pcb design, need to remeasure PCB outline. 2026-07-08 22:00:53 +02:00
Dennis Brentjes 4e7853351c Everything on the board. still missing some decoupling caps. 2026-07-05 21:49:57 +02:00
Roflin 3142e3bd59 Rework the PCB. 2026-07-04 20:00:02 +02:00
Roflin b4c2a53a9b Reworked the footprints. 2026-07-03 17:06:01 +02:00
Roflin 61641de40b Started on a 4 layer board with cutout for interposer 2026-06-27 22:25:03 +02:00
Roflin 857c428031 Played around with board shape/layout Changed USB power tree 2026-06-26 22:07:59 +02:00
Roflin 298804d3dd Finished rest of the schematics. 2026-06-20 11:55:39 +02:00