9 Commits

Author	SHA1	Message	Date
Roflin	fa8fbc35e7	PCB rework: place and route MDI termination + FTDI EEPROM resistors ... Rework by Dennis; reviewed with DRC 0 errors / 0 unconnected / 0 parity: - R26-R29 + C18/C19 at U11's MDI edge (1-3mm from pins), short stubs, ETH_DP impedance rules pass, pair skew TX 0.30mm / RX 0.72mm - D4/D5 true flow-through (PHY side faces U11, cable side faces J2) - In1 GND plane voided under the magjack cable/isolation side - R30/R31 placed at U7; 30 GND stitch vias in the ethernet corner Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>	2026-07-18 14:01:16 +00:00
Roflin	3547302ec2	Finished the PCB design	2026-07-17 21:35:02 +02:00
Dennis Brentjes	5727fc74a3	Fixes the power traces.	2026-07-09 20:08:05 +02:00
Dennis Brentjes	620ae5cd64	finalized pcb design, need to remeasure PCB outline.	2026-07-08 22:00:53 +02:00
Dennis Brentjes	4e7853351c	Everything on the board. still missing some decoupling caps.	2026-07-05 21:49:57 +02:00
Roflin	3142e3bd59	Rework the PCB.	2026-07-04 20:00:02 +02:00
Roflin	61641de40b	Started on a 4 layer board with cutout for interposer	2026-06-27 22:25:03 +02:00
Dennis Brentjes	079f3eed94	Started working on FPGA sheet.	2026-06-18 16:38:23 +02:00
Roflin	a7c88109a9	Started on component selection of the final PCB.	2026-06-13 22:09:05 +02:00