Files
rebbarb/exi_bba
Roflin 2aa50a7cc3 Reset the assembler's own write pointer on NCRA reset too
Hardware: "timeout: no match (0 seen, 0 bad desc, 0 lapped)".  Zero frames
reached the ring at all -- a regression from 83a62d6, which reset the REGISTER
FILE's copy of RWP on an NCRA reset but not RXFrameAssembler's own `rwp`.

They are two copies of the same pointer.  Resetting one leaves them
disagreeing about where the ring is: a driver that syncs RRP to the register
file's value (page 1) points somewhere the writer is not (wherever it left
off), the free-space sum shrinks with every frame, and once it falls below
_MAX_FRAME_PAGES the new overflow protection drops EVERY frame.  Silently,
because a dropped frame never reaches the ring to be counted -- hence 0 seen
rather than an error.

So fixing one half of a two-copy pointer created exactly the inconsistency the
other half had just been fixed for.  That is the third time in this session
that two copies of one piece of state has caused a hardware fault: the W5100's
init, then RRP, now RWP.  When adding state that the GC can also observe,
reset BOTH copies from the same event or do not keep two.

The reset is placed AFTER the FSM so it takes priority over ADVANCE_RWP in the
same cycle.  No in-flight frame needs abandoning: the same NCRA write that
pulses ncra_rst also clears the SR bit, so rx_enabled is low and the FSM is
already in IDLE.

T6 covers it and is mutation-tested.  Without the reset the frame lands on the
wrong page entirely and carries a previous frame's bytes:
    rwp back to page 1: got 4, want 2
    descriptor:         got [0,0,1,48], want [0,0,0,44]
    body index 0:       got 9, want 192

--seeds 8: clk 28.9-30.8 MHz, EXI 61.0-65.7 MHz, 8/8 PASS.  Best seed 2
(clk 30.83, EXI 65.72), flashed.  Gateware only -- the .dol is unchanged.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2026-10-09 18:41:06 +02:00
..
2026-06-13 19:02:58 +02:00
2026-06-14 09:37:59 +02:00