135 lines
6.3 KiB
Markdown
135 lines
6.3 KiB
Markdown
---
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name: kicad-manufacturing-export
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description: Use when regenerating or exporting the BOM CSV, CPL/position CSV, or Gerbers+drill zip for a KiCad PCB project via kicad-cli (e.g. "regenerate the gerbers", "update the BOM and CPL", "re-export for JLCPCB"). Covers the exact kicad-cli invocations and column formats this project's ordering files expect, and the CPL rotation-correction trap (regenerating the position file the naive way silently wipes hand-verified assembly rotation fixes). KiCad 8/9/10, JLCPCB-style deliverables.
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---
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# Regenerating BOM / CPL / Gerbers via kicad-cli
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For the `re-bba-rb` board specifically, deliverables live in
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`hardware/re-bba-rb/`: `re-bba-rb-bom.csv`, `re-bba-rb-cpl.csv`,
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`gerbers/rebbarb.zip`. Adjust paths/output names for other boards, but the
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gotchas below (especially the CPL rotation trap) apply generally.
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## 1. Gerbers + drill + zip
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```bash
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cd hardware/re-bba-rb
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kicad-cli pcb export gerbers --board-plot-params -o gerbers/ re-bba-rb.kicad_pcb
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kicad-cli pcb export drill --format excellon --excellon-separate-th \
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--excellon-units mm -o gerbers/ re-bba-rb.kicad_pcb
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```
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`--board-plot-params` reuses whatever layer/plot settings are already stored
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in the board file — don't hand-pick layers, this reproduces exactly what was
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there before. `--excellon-separate-th` splits plated/non-plated holes into
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`*-PTH.drl` / `*-NPTH.drl`, matching the existing file-naming convention.
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Then re-zip (excluding the previous zip itself, so it's not nested inside
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its own replacement):
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```python
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import zipfile, os
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folder = 'gerbers'
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files = sorted(f for f in os.listdir(folder) if f != 'rebbarb.zip')
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with zipfile.ZipFile(os.path.join(folder, 'rebbarb.zip'), 'w', zipfile.ZIP_DEFLATED) as z:
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for f in files:
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z.write(os.path.join(folder, f), arcname=f)
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```
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kicad-cli's gerber export also produces a `*-job.gbrjob` metadata file
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alongside the layer files — include it in the zip, it's harmless and some
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fabs use it for auto-configuration.
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## 2. BOM
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```bash
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kicad-cli sch export bom \
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--fields "ITEM_NUMBER,Reference,Value,Footprint,MPN,LCSC,QUANTITY,DNP,Manufacturer" \
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--labels "Item,Designator,Value,Footprint,MPN,LCSC,Qty,DNP,Manufacturer" \
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--group-by "Value,Footprint,MPN,LCSC,Manufacturer" \
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--sort-field "Reference" \
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--ref-range-delimiter "" \
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-o re-bba-rb-bom.csv \
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re-bba-rb.kicad_sch
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```
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`--ref-range-delimiter ""` disables range compression (`C18-C20` becomes
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`C18,C19,C20`) — this project's existing BOM convention is flat comma lists,
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not ranges; drop this flag if the target format wants ranges instead.
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`--group-by` on those 5 fields means any two components sharing value +
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footprint + MPN + LCSC + manufacturer collapse into one row (with a combined
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`Qty`) — this is how e.g. adding a new part that happens to match an
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*already-used* part (same value/footprint/MPN) merges into an existing BOM
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line instead of creating a new one, which is usually what you want (no new
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line item added to the order).
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Reference-only / non-purchasable footprints (gold-finger connectors, mouse-bite
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NPTH-hole footprints, etc.) are excluded automatically via `in_bom no` on the
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schematic symbol (or `exclude_from_bom` in the footprint's `attr`) — don't
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try to filter them out in the export command itself.
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**Verify after export**: diff the new BOM against the old one and sanity-check
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that only expected rows changed — an unexpectedly *shorter* BOM (fewer
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component rows/refs than before) is the signature of the
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[kicad-bom-edit](../kicad-bom-edit/SKILL.md) skill's "malformed property
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silently drops a whole sheet" bug, not a real BOM change.
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## 3. CPL / position file — the rotation trap
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```bash
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kicad-cli pcb export pos --format csv --units mm --side both --exclude-dnp \
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-o /tmp/pos_raw.csv re-bba-rb.kicad_pcb
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```
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kicad-cli's own CSV columns (`Ref,Val,Package,PosX,PosY,Rot,Side`) don't match
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JLCPCB's expected format (`Designator,Mid X,Mid Y,Layer,Rotation`, with
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`Layer` capitalized `Top`/`Bottom`, not lowercase `top`/`bottom`). Transform:
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```python
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import csv
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with open('/tmp/pos_raw.csv', newline='') as f:
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rows = list(csv.DictReader(f))
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with open('re-bba-rb-cpl.csv', 'w', newline='') as f:
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writer = csv.writer(f)
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writer.writerow(['Designator', 'Mid X', 'Mid Y', 'Layer', 'Rotation'])
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for r in rows:
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layer = 'Top' if r['Side'].strip().lower() == 'top' else 'Bottom'
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writer.writerow([r['Ref'], f"{float(r['PosX']):.6f}",
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f"{float(r['PosY']):.6f}", layer,
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f"{float(r['Rot']):.6f}"])
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```
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**Then — before treating this as done — reapply every correction in
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[`hardware/re-bba-rb/CPL_ROTATIONS.md`](../../../hardware/re-bba-rb/CPL_ROTATIONS.md).**
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KiCad's raw per-footprint rotation frequently does not match what the
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assembler expects (arbitrary per-footprint authoring reference vs. the
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assembler's actual placement convention), and this has already been
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hand-verified part-by-part against JLCPCB's placement-preview render for
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this board. Regenerating the position file "the normal way" silently
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overwrites those fixes back to (wrong) raw values — there is no automated
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check that catches this, so it's easy to quietly ship a regression. Read
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that file's sign-convention note before applying anything (short version:
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"N degrees clockwise" feedback means *subtract* N in the CPL's Y-up frame,
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not add it).
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Do **not** reach for a generic community rotation-correction table (e.g.
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`cpl_rotations_db.csv` from JLCKicadTools) as a shortcut — one was tried on
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this board and found wrong for at least one package family (claimed
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`LQFP-: 270°`; this board's actual correct value is 0°, unmodified). That
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table is calibrated against a specific plugin's own raw-rotation baseline,
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which is not the same as `kicad-cli`'s raw CSV baseline (different Y-axis
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handling) — the numbers don't transfer.
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## Quick full-refresh recipe
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1. Gerbers/drill/zip: regenerate + re-zip (section 1) — safe to always redo,
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no hidden state to lose.
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2. BOM: regenerate (section 2) — safe to always redo. Diff-check the row
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count.
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3. CPL: regenerate raw (section 3), **then reapply CPL_ROTATIONS.md** before
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calling it current.
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4. Run ERC (`kicad-cli sch erc --severity-all`) and DRC
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(`kicad-cli pcb drc --severity-all`) after any schematic/PCB change that
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prompted the refresh — not the export step itself, but worth confirming
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nothing regressed if this was bundled with other edits.
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