Roflin 5d9880f9c5 Add W5100 read-only register-dump probe (bring-up) ...

Reads socket-3 / status registers over the indirect bus and streams them on the
UART, without resetting the chip, to inspect what a UDP send left behind. First
hardware run was inconclusive (socket regs read 0x00 but SIPR/PHYSR didn't match
either "state persisted" or "clean reset") -- the FPGA reflash appears to glitch
RST_N, so a self-contained configure+send+readback is the reliable next step.
Committed as a starting point for that.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

2026-09-20 15:03:44 +00:00

.claude/skills

Correct EEPROM soft-brick record: partial write on undersized U7 kills enumeration

2026-08-22 18:57:52 +00:00

.devcontainer

Moved all components to F.Cu

2026-08-28 10:29:41 +02:00

diagrams

Adds diagrams.

2026-06-13 19:02:58 +02:00

docs

Fix EXI DO/DI swap: rename nets + swap damping resistors, no copper changes

2026-07-18 12:36:41 +00:00

examples

Added full design created with Claude

2026-06-13 18:35:38 +02:00

exi_bba

Add W5100 read-only register-dump probe (bring-up)

2026-09-20 15:03:44 +00:00

hardware

Bring-up: W5100 bus self-test, eFuse OVLO bug, Pi SPI EXI host

2026-09-20 14:33:49 +00:00

rebbarb

Added Debouncer ToggleButton and PulseButton

2025-09-20 22:44:04 +02:00

.dockerignore

Moved all components to F.Cu

2026-08-28 10:29:41 +02:00

.gitattributes

Adds a power_sch

2026-06-16 14:59:18 +02:00

.gitignore

Bring-up: W5100 bus self-test, eFuse OVLO bug, Pi SPI EXI host

2026-09-20 14:33:49 +00:00

capture.pcapng

Moved all components to F.Cu

2026-08-28 10:29:41 +02:00

CLAUDE.md

Enable in-container USB flashing + flash-re-bba-rb skill; find U7 EEPROM undersized

2026-08-22 14:44:43 +00:00

requirements.txt

Added full design created with Claude

2026-06-13 18:35:38 +02:00

S

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