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RoflinandClaude Fable 5 bad2b54574 TODO: verify and update status - all critical findings resolved

Re-verified every open item against the current board:
- All three critical findings (DO/DI swap, MDI termination incl.
  dampers + center-tap bypass, FTDI EEPROM resistors) now done in both
  schematic and PCB - marked resolved with review results
- Marked verified-done: 12V cap ratings, 1% tolerances, .history
  ignore, fiducial check (absent - to add with debug pass)
- Confirmed still open: ETH_RST pull-up, PR1 divider margin (R3 still
  200k), RSET 12.4k vs 12.3k, TPS22810 CT, iceprog pin mapping, board
  PCF, debug LEDs/test points, mechanical fit, ordering options

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

2026-07-18 14:14:01 +00:00

datasheets

Clean up hardware repo: kill the resurrecting stale power sheet, restore datasheets

2026-07-17 20:17:35 +00:00

ethernet.kicad_sch

PCB: insert MDI dampers R32-R35 in-line and place C20/C21 at J2 center taps

2026-07-18 14:10:23 +00:00

exi.kicad_sch

BOM: exclude J3 from BOM, verify part numbers against review requirements

2026-07-18 12:47:19 +00:00

fp-lib-table

Finished the PCB design