Starting work on PPU -> display -> VGA

sim/tb_top.sv

@@ -1,6 +1,10 @@
 module tb_top;
 
-logic clk;
+logic gb_clk;
+logic vga_clk;
+
+logic gb_nreset;
+logic vga_nreset;
 logic nreset;
 
 wire        gb_cart_clk;
@@ -11,13 +15,39 @@ wire        gb_cart_ncs;
 wire [15:0] gb_cart_addr;
 wire [ 7:0] gb_cart_data;
 
-clkgen clkgen_inst (
-  .clk   (clk),
-  .nreset(nreset)
+wire        display_enable;
+wire [ 1:0] ppu_pixel;
+wire        ppu_hsync;
+wire        ppu_vsync;
+
+logic [7:0] vga_r;
+logic [7:0] vga_g;
+logic [7:0] vga_b;
+logic       vga_hsync;
+logic       vga_vsync;
+
+// 4.19MHz
+clkgen #(
+  .PERIOD_NS      (238),
+  .RESET_DELAY_NS (400)
+) gb_clkgen_inst (
+  .clk   (gb_clk),
+  .nreset(gb_nreset)
 );
 
+// 25MHz
+clkgen #(
+  .PERIOD_NS      (40),
+  .RESET_DELAY_NS (70)
+) vga_clkgen_inst (
+  .clk   (vga_clk),
+  .nreset(vga_nreset)
+);
+
+assign nreset = gb_nreset & vga_nreset;
+
 gb gb_inst (
-  .clk   (clk),
+  .clk   (gb_clk),
   .nreset(nreset),
 
   .cart_clk_o   (gb_cart_clk),
@@ -26,7 +56,12 @@ gb gb_inst (
   .cart_nwr_o   (gb_cart_nwr),
   .cart_ncs_o   (gb_cart_ncs),
   .cart_addr_o  (gb_cart_addr),
-  .cart_data_io (gb_cart_data)
+  .cart_data_io (gb_cart_data),
+
+  .ppu_display_enable_o(display_enable),
+  .ppu_pixel_o  (ppu_pixel),
+  .ppu_vsync_o  (ppu_vsync),
+  .ppu_hsync_o  (ppu_hsync)
 );
 
 cart cart_inst (
@@ -39,10 +74,45 @@ cart cart_inst (
   .data_io (gb_cart_data)
 );
 
+display display_inst (
+  .nreset     (nreset),
+  .VGA_PALETTE(
+    //    RR GG BB
+    '{24'h00_00_00, // colour 00
+      24'h60_60_60, // colour 01
+      24'hA0_A0_A0, // colour 10
+      24'hFF_FF_FF} // colour 11
+  ),
+
+  .display_enable_i(display_enable),
+
+  .ppu_clk    (gb_clk),
+  .ppu_pixel_i(ppu_pixel),
+  .ppu_vsync_i(ppu_vsync),
+  .ppu_hsync_i(ppu_hsync),
+
+  .vga_clk    (vga_clk),
+  .vga_r_o    (vga_r),
+  .vga_g_o    (vga_g),
+  .vga_b_o    (vga_b),
+  .vga_hsync_o(vga_hsync),
+  .vga_vsync_o(vga_vsync)
+);
+
+vgasim vgasim_inst (
+  .clk   (vga_clk),
+  .nreset(nreset),
+
+  .r_i     (vga_r),
+  .g_i     (vga_g),
+  .b_i     (vga_b),
+  .hsync_i (vga_hsync),
+  .vsync_i (vga_vsync)
+);
 
 `ifdef SVA_ENABLE
 `include "sva_common.svh"
-`SVA_DEF_CLK(clk);
+`SVA_DEF_CLK(gb_clk);
 `SVA_DEF_NRESET(nreset);
 
 logic        instr_valid;
@@ -70,14 +140,14 @@ assign vram_sel  = gb_inst.vram_sel;
 assign hiram_sel = gb_inst.hiram_sel;
 assign ppu_sel   = gb_inst.ppu_inst.sva_ppu_sel;
 
-always_ff @(posedge clk or negedge nreset) begin
+always_ff @(posedge gb_clk or negedge nreset) begin
   if (!nreset)
     current_pc <= '0;
   else if (instr_valid)
     current_pc <= gb_inst.cpu_inst.pc_r;
 end
 
-always_ff @(posedge clk or negedge nreset) begin
+always_ff @(posedge gb_clk or negedge nreset) begin
   if (!nreset) begin
     last_write_address <= '0;
     last_write_value   <= '0;
@@ -108,7 +178,7 @@ localparam   MAX_COUNT = 10000;
 logic [15:0] pc_history       [$];
 int unsigned pc_history_count [$];
 
-always @(posedge clk iff instr_valid) begin
+always @(posedge gb_clk iff instr_valid) begin
   automatic int unsigned current_pc_count = 0;
 
   foreach (pc_history[i]) begin

sim/vgasim.sv

@@ -0,0 +1,44 @@
+module vgasim #(
+  parameter SCREEN_H = 640,
+  parameter SCREEN_W = 480,
+  parameter DEPTH    = 8
+) (
+  input  logic clk,
+  input  logic nreset,
+
+  input  logic [DEPTH-1:0] r_i,
+  input  logic [DEPTH-1:0] g_i,
+  input  logic [DEPTH-1:0] b_i,
+  input  logic             hsync_i,
+  input  logic             vsync_i
+);
+
+import "DPI-C" function int vgasim_init(input int screen_h, input int screen_w, input int screen_bpp);
+import "DPI-C" function int vgasim_reset();
+import "DPI-C" function int vgasim_tick(input int r, input int g, input int b, input int hsync, input int vsync);
+
+initial begin
+  automatic int ret = vgasim_init(SCREEN_W, SCREEN_H, DEPTH);
+  assert (ret == 0) else begin
+    $display($sformatf("[%0t] vgasim init failed: %d", $time, ret));
+    $fatal();
+  end
+end
+
+always @(negedge nreset) begin
+  automatic int ret = vgasim_reset();
+  assert (ret == 0) else begin
+    $display($sformatf("[%0t] vgasim reset failed: %d", $time, ret));
+    $fatal();
+  end
+end
+
+always @(posedge clk iff nreset) begin
+  automatic int ret = vgasim_tick(r_i, g_i, b_i, hsync_i, vsync_i);
+  assert (ret == 0) else begin
+    $display($sformatf("[%0t] vgasim tick failed: %d", $time, ret));
+    $fatal();
+  end
+end
+
+endmodule : vgasim