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Implement RL r instruction

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Some groundwork on rotation operations
This commit is contained in:
Koray Yanik
2022-02-08 16:14:57 +00:00
parent da29d148bf
commit 4f892eb3f2
6 changed files with 69 additions and 20 deletions
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9
sim/tbench/tb_top.sv
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@@ -18,6 +18,8 @@ module tb_top ();
logic halted;
logic [15:0] last_pc;
logic [ 7:0] last_opcode;
logic [ 7:0] last_op1;
logic [ 7:0] last_op2;
logic we;
logic [15:0] address;
@@ -27,6 +29,8 @@ module tb_top ();
assign instr_undef = gb_inst.cpu_inst.control_inst.is_undef;
assign last_pc = gb_inst.cpu_inst.control_inst.instr_pc_r;
assign last_opcode = gb_inst.cpu_inst.control_inst.instr_r;
assign last_op1 = gb_inst.cpu_inst.control_inst.operand0_r;
assign last_op2 = gb_inst.cpu_inst.control_inst.operand1_r;
assign we = gb_inst.we;
assign address = gb_inst.address;
@@ -34,11 +38,12 @@ module tb_top ();
always @(posedge clk) begin
if (nreset && instr_undef & ~halted) begin
$display($sformatf("[%t] %X: Undefined opcode %X", $time(), last_pc, last_opcode));
$display($sformatf("[%0t] %X: Undefined opcode %X | [%X | %X]", $time(), last_pc, last_opcode, last_op1, last_op2));
$fatal(0);
$finish();
end
if (nreset && we) begin
$display($sformatf("[%t] Write: [%X] <= %X", $time(), address, wdata));
$display($sformatf("[%0t] Write: [%X] <= %X", $time(), address, wdata));
end
end