Commit Graph

4 Commits

Author SHA1 Message Date
fda176d3b5 Complete rewrite from scratch, bootstrap WIP
Rewrite to use several bus multiplexers, resulting into a less messy
microarchitecture (hopefully). Some more room for cleanup though...

Supports every instruction from the bootstrap rom, more or less.
LY hacked at 0x90 to progress through vsync instantly.
No cartridge is present yet, so we will always fail checksum test and lock up.
2023-10-01 23:00:56 +01:00
dc32757dfc Implement ld r, r 2021-02-22 21:43:22 +00:00
aa92344d10 Initial work on decoder
Decode the LD SP, $nnnn instruction as our first three-byte
instruction.
2021-02-16 21:13:50 +00:00
e56afb8c9e Initial work on build system
Simple makefile to build testbench in vivado.
Testbench currently just has a clock and a reset.
Empty gb top module.
2021-02-15 21:40:12 +00:00