4 Commits

Include renames

Author	SHA1	Message	Date
fumyuun	82584dab34	More WIP on PPU	2023-10-31 22:48:14 +00:00
fumyuun	3c3dbd2175	Starting work on PPU -> display -> VGA	2023-10-13 20:46:05 +01:00
fumyuun	9cc63a248e	Fix some verilog issues	2023-10-03 22:30:36 +01:00
fumyuun	06746f71fb	WIP PPU LX/LY registers ... Removed second reg16 read port - no longer needed.	2023-10-03 20:44:28 +01:00