Koray Yanik
fda176d3b5
Rewrite to use several bus multiplexers, resulting into a less messy microarchitecture (hopefully). Some more room for cleanup though... Supports every instruction from the bootstrap rom, more or less. LY hacked at 0x90 to progress through vsync instantly. No cartridge is present yet, so we will always fail checksum test and lock up.
22 lines
465 B
Systemverilog
22 lines
465 B
Systemverilog
`include "cpu_pkg.svh"
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import cpu_pkg::*;
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module alu16 (
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input logic [15:0] operand_in_i,
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output logic [15:0] operand_out_o,
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input logic increment_i,
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input logic decrement_i
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);
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logic [15:0] op_inc;
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logic [15:0] op_dec;
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assign op_inc = (operand_in_i + 16'h01);
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assign op_dec = (operand_in_i - 16'h01);
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assign operand_out_o = ({16{increment_i}} & op_inc) |
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({16{decrement_i}} & op_dec);
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endmodule : alu16
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