Koray Yanik
fda176d3b5
Rewrite to use several bus multiplexers, resulting into a less messy microarchitecture (hopefully). Some more room for cleanup though... Supports every instruction from the bootstrap rom, more or less. LY hacked at 0x90 to progress through vsync instantly. No cartridge is present yet, so we will always fail checksum test and lock up.
145 lines
2.4 KiB
Systemverilog
145 lines
2.4 KiB
Systemverilog
package cpu_pkg;
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typedef enum logic [2:0] {
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REG8_B = 3'h00,
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REG8_C = 3'h01,
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REG8_D = 3'h02,
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REG8_E = 3'h03,
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REG8_H = 3'h04,
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REG8_L = 3'h05,
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REG8_PHL = 3'h06,
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REG8_A = 3'h07
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} reg8_t;
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typedef enum logic [1:0] {
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REG16_BC = 2'h00,
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REG16_DE = 2'h01,
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REG16_HL = 2'h02,
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REG16_SP_AF = 2'h03
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} reg16_t;
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typedef enum logic [1:0] {
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CC_NZ = 2'h00,
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CC_Z = 2'h01,
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CC_NC = 2'h02,
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CC_C = 2'h03
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} cc_t;
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typedef enum logic [2:0] {
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ALU_OP_ADD = 3'h00,
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ALU_OP_ADC = 3'h01,
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ALU_OP_SUB = 3'h02,
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ALU_OP_SBC = 3'h03,
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ALU_OP_AND = 3'h04,
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ALU_OP_XOR = 3'h05,
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ALU_OP_OR = 3'h06,
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ALU_OP_CP = 3'h07
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} alu_op_t;
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typedef enum logic [2:0] {
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SHIFT_OP_RLC = 3'h00,
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SHIFT_OP_RRC = 3'h01,
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SHIFT_OP_RL = 3'h02,
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SHIFT_OP_RR = 3'h03,
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SHIFT_OP_SLA = 3'h04,
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SHIFT_OP_SRA = 3'h05,
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SHIFT_OP_SLL = 3'h06,
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SHIFT_OP_SRL = 3'h07
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} shift_op_t;
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typedef struct packed {
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logic b;
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logic s;
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logic r;
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logic [2:0] operand;
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} bsr_op_t;
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typedef struct packed {
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logic inc;
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logic dec;
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logic dst_a;
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} incdec_op_t;
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typedef struct packed {
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logic update_a;
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logic update_f;
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logic alu_op_valid;
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alu_op_t alu_op;
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logic shift_op_valid;
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shift_op_t shift_op;
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logic bsr_op_valid;
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bsr_op_t bsr_op;
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logic incdec_op_valid;
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incdec_op_t incdec_op;
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} alu_ctrl_t;
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typedef enum {
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ADDR_SRC_PC,
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ADDR_SRC_SP,
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ADDR_SRC_REG16, // TODO reuse BUS_Q
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ADDR_SRC_REG8, // TODO reuse BUS_Q
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ADDR_SRC_OPERAND8,
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ADDR_SRC_OPERAND16,
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ADDR_SRC_BUS_P,
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ADDR_SRC_BUS_Q
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} addr_src_t;
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typedef enum {
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BUS_SRC_A,
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BUS_SRC_F,
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BUS_SRC_REG8,
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BUS_SRC_OPERAND8_H,
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BUS_SRC_OPERAND8_L,
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BUS_SRC_ALU,
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BUS_SRC_MEM,
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BUS_SRC_PC_H,
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BUS_SRC_PC_L,
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BUS_SRC_REG16_H,
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BUS_SRC_REG16_L
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} bus_src_t;
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typedef enum {
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BUS_DST_SP_H,
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BUS_DST_SP_L,
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BUS_DST_ALU,
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BUS_DST_REG8,
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BUS_DST_REG16_H,
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BUS_DST_REG16_L,
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BUS_DST_PC_H,
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BUS_DST_PC_L,
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BUS_DST_MEM
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} bus_dst_t;
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typedef struct packed {
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bus_src_t src;
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bus_dst_t dst;
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logic wen;
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} bus_ctrl_t;
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typedef enum {
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BUS16_SRC_REG16,
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BUS16_SRC_ALU16,
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BUS16_SRC_SP
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} bus16_src_t;
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typedef enum {
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BUS16_DST_REG16,
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BUS16_DST_ALU16,
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BUS16_DST_SP
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} bus16_dst_t;
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typedef struct packed {
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bus16_src_t src;
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bus16_dst_t dst;
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logic wen;
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} bus16_ctrl_t;
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typedef enum {
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PC_SRC_INC,
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PC_SRC_OPERAND8,
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PC_SRC_OPERAND16,
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PC_SRC_BUS
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} pc_src_t;
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endpackage : cpu_pkg
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