fumyuun/svgb
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SystemVerilog 88%
C 11.5%
Makefile 0.5%
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Koray Yanik 5f98c7346f Add chip selects to rom/ram 
Slightly easier to work with ppu and cart memory spaces this way
2023-10-02 21:23:39 +01:00
build Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
rtl Add chip selects to rom/ram 2023-10-02 21:23:39 +01:00
sim Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
synthflow@1486728ced Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
.gitignore Complete rewrite from scratch, bootstrap WIP 2023-10-01 23:00:56 +01:00
.gitmodules Initial work on build system 2021-02-15 21:40:12 +00:00
README.md Initial commit 2021-02-15 14:54:08 +01:00

README.md

svgb