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svgb
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9cc63a248e
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Koray Yanik
9cc63a248e
Fix some verilog issues
2023-10-03 22:30:36 +01:00
build
WIP PPU LX/LY registers
2023-10-03 20:44:28 +01:00
rtl
Fix some verilog issues
2023-10-03 22:30:36 +01:00
sim
Fix some verilog issues
2023-10-03 22:30:36 +01:00
synthflow
@
1486728ced
Complete rewrite from scratch, bootstrap WIP
2023-10-01 23:00:56 +01:00
.gitignore
Complete rewrite from scratch, bootstrap WIP
2023-10-01 23:00:56 +01:00
.gitmodules
Initial work on build system
2021-02-15 21:40:12 +00:00
README.md
Initial commit
2021-02-15 14:54:08 +01:00
README.md
svgb