svgb/sim
Koray Yanik e56afb8c9e Initial work on build system
Simple makefile to build testbench in vivado.
Testbench currently just has a clock and a reset.
Empty gb top module.
2021-02-15 21:40:12 +00:00
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tbench Initial work on build system 2021-02-15 21:40:12 +00:00