Go to file
2021-02-22 23:07:10 +00:00
build Initial register bank, support LD RR, $nnnn instructions 2021-02-17 22:40:24 +00:00
rtl Implement call nn 2021-02-22 23:07:10 +00:00
sim Implement LD ($FF00+C), A 2021-02-20 22:10:47 +00:00
synthflow@767277e341 Initial work on build system 2021-02-15 21:40:12 +00:00
.gitignore Implement ld r, r 2021-02-22 21:43:22 +00:00
.gitmodules Initial work on build system 2021-02-15 21:40:12 +00:00
README.md Initial commit 2021-02-15 14:54:08 +01:00

svgb