re-bba-rb/re-bba/ReBba/Components/ShiftRegister.py

30 lines
732 B
Python

from ReBba.Components.ExiClock import ClockState
from amaranth import *
from amaranth.build import Platform
class ShiftRegister(Elaboratable):
def __init__(self, width):
self.width = width
# Ports
self.nen = Signal()
self.exiClkState = Signal(2)
self.rst = Signal()
self.inb = Signal()
self.data = Signal(self.width, reset=0)
def elaborate(self, platform: Platform):
m = Module()
with m.If(self.rst):
m.d.sync += self.data.eq(self.data.reset)
with m.If(~self.nen):
with m.If(self.exiClkState == ClockState.FALLING):
m.d.sync += self.data.eq(self.data.shift_left(1) | self.inb )
return m