103 lines
2.6 KiB
Python
103 lines
2.6 KiB
Python
import sys
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import os
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from amaranth import *
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from amaranth.back import verilog
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from amaranth.build.plat import Platform
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from amaranth.sim import Simulator
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from amaranth_boards.icebreaker import *
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from ExiClock import ExiClock
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from ExiRequest import ExiRequest
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from Debouncer import Debouncer
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from ExiDecoder import ExiDecoder
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class ReBba(Elaboratable):
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def __init__(self):
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pass
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def elaborate(self, platform: Platform):
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m = Module()
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uledg = platform.request("led_g", 0)
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uledr = platform.request("led_r", 0)
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led1 = platform.request("led_g", 1)
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led2 = platform.request("led_g", 4)
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led3 = platform.request("led_g", 2)
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led4 = platform.request("led_g", 3)
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led5 = platform.request("led_r", 1)
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btn1 = platform.request("button", 1)
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btn2 = platform.request("button", 2)
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btn3 = platform.request("button", 3)
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debounce1 = Debouncer(10000)
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m.submodules += debounce1
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m.d.comb += debounce1.input.eq(btn3)
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exiClk = ExiClock()
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m.submodules += exiClk
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m.d.comb += exiClk.exiClk.eq(debounce1.output)
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exiReq = ExiRequest()
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m.submodules += exiReq
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m.d.comb += exiReq.exiClkState.eq(exiClk.exiClkState)
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m.d.comb += exiReq.exiIn.eq(btn1)
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m.d.comb += exiReq.rst.eq(btn2)
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m.d.comb += led1.eq(exiReq.request[0])
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m.d.comb += led2.eq(exiReq.request[1])
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m.d.comb += led3.eq(exiReq.request[2])
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m.d.comb += led4.eq(exiReq.request[3])
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m.d.comb += led5.eq(exiReq.requestComplete)
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exiDec = ExiDecoder()
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m.submodules += exiDec
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m.d.comb += exiDec.request.eq(exiReq.request)
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m.d.comb += uledr.eq(exiDec.request_type[0])
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m.d.comb += uledg.eq(exiReq.requestComplete)
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return m
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class TestBench:
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def __init__(self):
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pass
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def simulate(self):
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pass
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def main():
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if(len(sys.argv) == 2):
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if sys.argv[1] == "s":
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bench = TestBench()
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bench.simulate()
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if sys.argv[1] == "v":
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mod = ReBba()
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with open(os.path.dirname(os.path.abspath(__file__)) + "/bba.v", "w") as f:
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f.write(verilog.convert(mod, ports=[]))
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if sys.argv[1] == "p":
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mod = ReBba()
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platform = ICEBreakerPlatform()
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platform.add_resources(platform.break_off_pmod)
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platform.build(mod, do_program=True)
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else:
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bench = TestBench()
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bench.simulate()
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#####
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# Main portion
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#####
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if __name__ == "__main__":
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main()
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