Roflin
64123014bf
Board V1 ships as-is (capture closes full-speed on 4/8 seeds). Documents, for a possible future push toward more capture margin (e.g. 64 MHz), that the binding path is now the tx_fifo exi->capture Gray-code CDC pointer loop (~6.4ns logic + ~10.7ns routing = 17.1ns / 58.4MHz), and the two measured levers: a lightweight 2-deep ping-pong TX CDC (RTL, pinout- independent, est. 67-80MHz - the reliable one) and EXI/W5100 pin co-location on one die edge (respin, routing-half only, ~63MHz seen). Both investigated but NOT applied. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>