9 Commits

Author	SHA1	Message	Date
Koray Yanik	fda176d3b5	Complete rewrite from scratch, bootstrap WIP ... Rewrite to use several bus multiplexers, resulting into a less messy microarchitecture (hopefully). Some more room for cleanup though... Supports every instruction from the bootstrap rom, more or less. LY hacked at 0x90 to progress through vsync instantly. No cartridge is present yet, so we will always fail checksum test and lock up.	2023-10-01 23:00:56 +01:00
Koray Yanik	e713f8de87	Implement RLA and POP RR	2022-02-08 23:53:02 +00:00
Koray Yanik	4f892eb3f2	Implement RL r instruction ... Some groundwork on rotation operations	2022-02-08 16:14:57 +00:00
Koray Yanik	ded64a8954	Implement inc r	2021-02-20 22:57:15 +00:00
Koray Yanik	67361093ec	Implement LD r, $nn	2021-02-20 15:56:22 +00:00
Koray Yanik	93912e2089	Implemented BIT $n, r ... First of the CB prefixed opcodes.	2021-02-19 21:53:13 +00:00
Koray Yanik	8f0b8d3a48	Implemented LDD (HL), A	2021-02-18 23:22:26 +00:00
Koray Yanik	2937ff492b	Initial register bank, support LD RR, $nnnn instructions	2021-02-17 22:40:24 +00:00
Koray Yanik	237a5f1489	Implemented SP, $nnnn and XOR A instructions	2021-02-16 23:05:46 +00:00