Commit Graph

7 Commits

Author SHA1 Message Date
7cec002e1a Starting work on a simple cartridge
In order to get through bootstrap process
2023-10-02 21:56:19 +01:00
5f98c7346f Add chip selects to rom/ram
Slightly easier to work with ppu and cart memory spaces this way
2023-10-02 21:23:39 +01:00
fda176d3b5 Complete rewrite from scratch, bootstrap WIP
Rewrite to use several bus multiplexers, resulting into a less messy
microarchitecture (hopefully). Some more room for cleanup though...

Supports every instruction from the bootstrap rom, more or less.
LY hacked at 0x90 to progress through vsync instantly.
No cartridge is present yet, so we will always fail checksum test and lock up.
2023-10-01 23:00:56 +01:00
e713f8de87 Implement RLA and POP RR 2022-02-08 23:53:02 +00:00
49ce1631b3 Implement LD ($FF00+C), A 2021-02-20 22:10:47 +00:00
3191a19f7e Initial work on reading instructions from bootROM 2021-02-15 22:55:09 +00:00
e56afb8c9e Initial work on build system
Simple makefile to build testbench in vivado.
Testbench currently just has a clock and a reset.
Empty gb top module.
2021-02-15 21:40:12 +00:00