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11 Commits

Author SHA1 Message Date
Roflin 7a58e68adb Reworked power section to fit the exi traces. 2026-07-04 11:41:49 +02:00
Roflin ae3d24dd9c Reworked the footprints. 2026-07-03 17:06:01 +02:00
Roflin 609005b062 Started on a 4 layer board with cutout for interposer 2026-06-27 22:25:03 +02:00
Roflin 857c428031 Played around with board shape/layout Changed USB power tree 2026-06-26 22:07:59 +02:00
Roflin 298804d3dd Finished rest of the schematics. 2026-06-20 11:55:39 +02:00
Dennis Brentjes 079f3eed94 Started working on FPGA sheet. 2026-06-18 16:38:23 +02:00
Dennis Brentjes a6a6aa37e0 Added Usb sheet 2026-06-17 21:37:49 +02:00
Roflin 056557345f Adds a power_sch 2026-06-16 14:59:18 +02:00
Roflin a7c88109a9 Started on component selection of the final PCB. 2026-06-13 22:09:05 +02:00
Roflin 57b5b471b8 Moved project specific symbols to project specific library. 2025-10-03 09:07:21 +02:00
Roflin eea189ae61 Start of a new debug connector 2025-09-19 12:06:05 +02:00
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